Publications associées à Physical design (electronics)

Manufacturing and Tests of the European 1 MW, 170 GHz CW Gyrotron Prototype for ITER

Stefano Alberti, Jean-Philippe Hogge, Konstantinos Avramidis

An industrial 1 MW, 170 GHz continuous-wave (CW) gyrotron prototype has been manufactured in 2015 at Thales. The physical design is provided by the European GYrotron Consortium (EGYC) and is supported by the construction and the measurement of a modular sh ...

IEEE2016

Methodology for 3-D Substrate Network Extraction for SPICE Simulation of Parasitic Currents in Smart Power ICs

Maher Kayal, Jean-Michel Sallese, Camillo Stefanucci, Pietro Buccella

A 3-D simulation of substrate currents is crucial to analyze parasitic coupling effects due to minority carrier injection in smart power ICs. In this paper, a substrate parasitic extraction methodology is introduced by dividing the IC layout into elementar ...

Ieee-Inst Electrical Electronics Engineers Inc2016

A Multi-Gbps Unrolled Hardware List Decoder Systematic Polar Code

Andreas Peter Burg, Alexios Konstantinos Balatsoukas Stimming, Thomas Christoph Müller, Pascal Giard

Polar codes are a new class of block codes with an explicit construction that provably achieve the capacity of various communications channels, even with the low-complexity successive-cancellation (SC) decoding algorithm. Yet, the more complex successive-c ...

2016

Boolean Logic Optimization in Majority-Inverter Graphs

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Luca Gaetano Amarù

We present a Boolean logic optimization framework based on Majority-Inverter Graph (MIG). An MIG is a directed acyclic graph consisting of three-input majority nodes and regular/complemented edges. Current MIG optimization is supported by a consiste ...

2015

Spice Simulation of Passive Protection in Smart Power ICs

Maher Kayal, Jean-Michel Sallese, Camillo Stefanucci, Pietro Buccella

When designing in Smart Power technologies, TCAD simulations are mandatory to design effective passive protections against parasitic couplings due to minority carriers. The objective of this paper is to propose a spice-based approach to characterize electr ...

Ieee2015

Compressive image acquisition in modern CMOS IC design

Pierre Vandergheynst, Alexandre Schmid, Yusuf Leblebici, Mahdad Hosseini Kamal, Nikola Katic

Compressive sampling (CS) offers bandwidth, power, and memory size reduction compared to conventional (Nyquist) sampling. These are very attractive features for the design of modern complementary metal-oxide semiconductor (CMOS) image sensors, cameras, and ...

Wiley-Blackwell2015

Modeling Minority Carriers Related Capacitive Effects for Transient Substrate Currents in Smart Power ICs

Maher Kayal, Jean-Michel Sallese, Camillo Stefanucci, Pietro Buccella

This paper presents an extended model for transient and ac circuit-level simulation of minority carriers propagation through the substrate of smart power integrated circuits (ICs). A p-n junction and a diffusion resistor with capacitive components are prop ...

Institute of Electrical and Electronics Engineers2015

Automated Design Flow for Multi-Functional Dataflow-Based Platforms

Marco Mattavelli, Simone Casale Brunet, Endri Bezati

The implementation of processing platforms supporting multiple applications by runtime reconfigurations on dedicated hardware modules requires the solution of different problems. These problems are notably not-trivial since both platform and application co ...

Springer Verlag2015

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Physical design (electronics)

Manufacturing and Tests of the European 1 MW, 170 GHz CW Gyrotron Prototype for ITER

Methodology for 3-D Substrate Network Extraction for SPICE Simulation of Parasitic Currents in Smart Power ICs

A Multi-Gbps Unrolled Hardware List Decoder Systematic Polar Code

Boolean Logic Optimization in Majority-Inverter Graphs

Spice Simulation of Passive Protection in Smart Power ICs

Compressive image acquisition in modern CMOS IC design

Modeling Minority Carriers Related Capacitive Effects for Transient Substrate Currents in Smart Power ICs

Automated Design Flow for Multi-Functional Dataflow-Based Platforms

Panel: The Future of Electronics, Semiconductors, and Design in Europe

A Miniaturized Insect Eye Inspired Multi-camera Real-time Panoramic Imaging System

Graph Chatbot

Chattez avec Graph Search

A Multi-Gbps Unrolled Hardware List Decoder Systematic Polar Code

Methodology for 3-D Substrate Network Extraction for SPICE Simulation of Parasitic Currents in Smart Power ICs

Compressive image acquisition in modern CMOS IC design

Manufacturing and Tests of the European 1 MW, 170 GHz CW Gyrotron Prototype for ITER

Boolean Logic Optimization in Majority-Inverter Graphs

Spice Simulation of Passive Protection in Smart Power ICs

Modeling Minority Carriers Related Capacitive Effects for Transient Substrate Currents in Smart Power ICs

Automated Design Flow for Multi-Functional Dataflow-Based Platforms

Panel: The Future of Electronics, Semiconductors, and Design in Europe

A Miniaturized Insect Eye Inspired Multi-camera Real-time Panoramic Imaging System