Concept

Design rule checking

Publications associées (47)

Biconditional Binary Decision Diagrams: A Novel Canonical Logic Representation Form

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Luca Gaetano Amarù

In this paper, we present biconditional binary deci- sion diagrams (BBDDs), a novel canonical representation form for Boolean functions. BBDDs are binary decision diagrams where the branching condition, and its associated logic expansion, is biconditional ...

2014

Low-temperature plasma-deposited silicon epitaxial films: Growth and properties

Stefaan De Wolf

Low-temperature (≤200 °C) epitaxial growth yields precise thickness, doping, and thermal-budget control, which enables advanced-design semiconductor devices. In this paper, we use plasma-enhanced chemical vapor deposition to grow homo-epitaxial layers and ...

American Institute of Physics2014

Low-temperature plasma-deposited silicon epitaxial films: Growth and properties

Christophe Ballif, Quentin Thomas Jeangros, Duncan Thomas Lindsay Alexander, Stefaan De Wolf, Johannes Peter Seif, Bénédicte Demaurex

Low-temperature (

American Institute of Physics2014

Compressive Image Acquisition in Modern CMOS IC Design

Pierre Vandergheynst, Alexandre Schmid, Yusuf Leblebici, Mahdad Hosseini Kamal, Nikola Katic

Compressive Sampling (CS) offers bandwidth, power and memory size reduction compared to conventional (Nyquist) sampling. However, very few Integrated Circuit (IC) designs based on CS exist due to the missing link between the well-established CS theory on o ...

Wiley-Blackwell2013

Design Methodologies and CAD for Emerging Nanotechnologies

Shashi Kanth Bobba

With technology scaling reaching the fundamental limits of Si-CMOS in the near future, the semiconductor industry is in quest for innovation from various disciplines of integrated circuit (IC) design. At a fundamental level, technology forms the main drive ...

EPFL2013

Identifying and modeling the integrated design process of net Zero Energy buildings

Marilyne Andersen, Shady Galal Mohamed Attia, Emmanuel Walter

High Performance Buildings (HPB), including Net Zero Energy Buildings (NZEBs) and nearly Zero Energy Buildings (nZEB) are emerging as an important market in Europe and around the world. However, there are very few studies that aim to model the process of H ...

2013

Integration of Correct-by-Construction BIP Models into the MetroII Design Space Exploration Flow

Alena Simalatsar

Design correctness and performance are major issues which are usually considered separately, and with different emphasis, by traditional system design flows. In this paper we show that one can meaningfully connect and benefit from the advantages of two des ...

IEEE2012

Developing Highly-Integrated Subcutaneous Biochips for Remote Monitoring of Human Metabolism

Giovanni De Micheli, Sandro Carrara, Jacopo Olivo, Andrea Cavallini, Seyedeh Sara Ghoreishizadeh

A highly integrated system for remote monitoring of several human metabolites is proposed. It is obtained by integrating several components, such as: bio-probes, carbon nanotubes, micro-fabricated gold-electrodes, temperature and pH sensors, extremely smal ...

Ieee2012

Neural Network-Based Thermal Simulation of Integrated Circuits on GPUs

David Atienza Alonso, Arvind Raj Mahankali Sridhar, Martino Ruggiero, Alessandro Vincenzi

With the rising challenges in heat removal in integrated circuits (ICs), the development of thermal-aware computing architectures and run-time management systems have become indispensable to the continuation of IC design scaling. These thermal-aware design ...

Institute of Electrical and Electronics Engineers2012

Vertically-stacked gate-all-around polysilicon nanowire FETs with sub-μm gates patterned by nanostencil lithography

Giovanni De Micheli, Jürgen Brugger, Andreea Veronica Savu, Davide Sacchetto, Michail Zervas, Shenqi Xie, Yusuf Leblebici

We report on the top-down fabrication of vertically-stacked polysilicon nanowire (NW) gate-all-around (GAA) field-effect-transistors (FET) by means of Inductively Coupled Plasma (ICP) etching and nanostencil lithography. The nanostencil is used to form sub ...

Elsevier2012

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