Concept

Design rule checking

Publications associées (47)

Single-photon Avalanche Diodes in sub-100nm Standard CMOS Technologies

Edoardo Charbon, Hyungjune Yoon, Mohammad Azim Karami

Single-photon avalanche diodes (SPADs) are evaluated in two sub-100nm CMOS technologies. Several geometries are implemented, whereas premature edge breakdown (PEB) prevention is achieved with n-well rings. The octagonal SPADs are implemented in 90nm and 65 ...

2011

Reliable Circuit Design with Nanowire Arrays

Giovanni De Micheli, Mohamed Haykel Ben Jamaa

The emergence of different fabrication techniques of silicon nanowires (SiNWs) raises the question of finding a suitable architectural organization of circuits based on them. Despite the possibility of building conventional CMOS circuits with SiNWs, the ab ...

Springer2011

Efficient Modelling and Simulation Methodology for the Design of Heterogeneous Mixed-Signal Systems on Chip

Torsten Mähne

Systems on Chip (SoCs) and Systems in Package (SiPs) are key parts of a continuously broadening range of products, from chip cards and mobile phones to cars. Besides an increasing amount of digital hardware and software for data processing and storage, the ...

EPFL2011

Rational Design of Pd-Based Catalysts for Selective Alkyne Hydrogenations

Rocio Micaela Crespo Quesada

Traditionally, the search for active and selective catalysts involved a rather tedious "hit-and-miss" approach in which hundreds, if not thousands catalysts were tested until the optimal substance was identified. With the advancing theoretical understandin ...

EPFL2011

Pruned Continuous Haar Transform of 2D Polygonal Patterns with Application to VLSI Layouts

Paul Hurley, Robin Scheibler, Amina Chebira

We introduce an algorithm for the efﬁcient computation of the continuous Haar transform of 2D patterns that can be described by polygons. These patterns are ubiquitous in VLSI processes where they are used to describe design and mask layouts. There speed i ...

2010

3D Structuration Techniques of LTCC for Microsystems Applications

Yannick Sébastien Fournier

This thesis aimed at developing new 3D structuration techniques for a relatively recent new ceramic technology called LTCC, which stands for Low Temperature, Co-fired Ceramic. It is a material originally developed for the microelectronic packaging industry ...

EPFL2010

Qualification tests for ITER TF conductors in SULTAN

Pierluigi Bruzzone, Boris Stepanov, Rainer Wesche

From February 2007 to May 2008, 18 short length conductor sections have been tested in SULTAN for design verification and manufacturer qualification of the ITER Toroidal Field (TF) conductor. The test program is focussed on the current sharing temperature, ...

Elsevier2009

Design and Realization of a Fault-Tolerant 90nm Cryptographic Engine Capable of Performing under Massive Defect Density

Alexandre Schmid, Yusuf Leblebici, Milos Stanisavljevic, Maria Gabrani

This paper presents a new approach for assessing the reliability of nanometer-scale devices prior to fabrication and a practical reliability architecture realization. A four-layer architecture exhibiting a large immunity to permanent as well as random fail ...

ACM2007

Improvements for Constraint Solving in the SystemC Verification Library

For verification of complex system-on-chip designs often constraint-based randomization is used. This allows to simulate scenarios that may be difficult to generate manually. For the system description language SystemC the SystemC Verification (SCV) Librar ...

2007

Piezoresistive cantilevers in a commercial CMOS technology for intermolecular force detection

Luis Guillermo Villanueva Torrijo

We report the development of piezoresistive cantilevers for intermolecular force detection in biochemical sensing, by using a commercial CMOS technology. The detection of the small forces involved in molecular recognition requires cantilevers with a small ...

2006

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