Trace numérique

Résumé

vignette|Carte d'Internet Le terme trace numérique est utilisé dans les domaines de la sécurité, de l'informatique légale et des systèmes d'information. Il désigne les informations qu'un dispositif numérique enregistre sur l'activité ou l'identité de ses utilisateurs au moyen de traceurs tels que les cookies, soit automatiquement, soit par le biais d'un dépôt intentionnel. Moteurs de recherche, blogs, sites de réseautage social, sites de commerce électronique, mais aussi cartes à puce, titres de transport, téléphones mobiles : tous les systèmes qui requièrent une identification ou une interaction sont susceptibles de capter des informations sur l'utilisateur – parcours, requêtes, préférences, achats, connexions, évaluations, coordonnées. Les traces ne sont pas des messages, mais des données (en général des fichiers de log) . Prises isolément, elles n'ont guère de sens. Mais regroupées, traitées et combinées dans d'importantes bases de données, elles peuvent révéler des informations

Source officielle

https://fr.wikipedia.org/wiki/Trace_num%C3%A9rique

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Cours associés (1)

This course provides a detailed description of the organization and operating principles of mobile and wireless communication networks.

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STREX: Boosting Instruction Cache Reuse in OLTP Workloads Through Stratified Transaction Execution

Anastasia Ailamaki, Xin Tong, Pinar Tözün

Online transaction processing (OLTP) workload performance suffers from instruction stalls; the instruction footprint of a typical transaction exceeds by far the capacity of an L1 cache, leading to ongoing cache thrashing. Several proposed techniques remove some instruction stalls in exchange for error-prone instrumentation to the code base, or for a sharp increase the L1-I cache unit area and power. Others reduce instruction miss latency by better utilizing a shared L2 cache. SLICC, a recently proposed thread migration technique that exploits transaction instruction locality, is promising for high core counts but performs sub-optimally or may hurt performance when running on few cores. This paper corroborates that OLTP transactions exhibit significant intra- and inter-thread overlap in their instruction footprint, and analyzes the instruction stall reduction benefits. This paper presents STREX, a hardware, programmer-transparent technique that exploits typical transaction behavior to improve instruction reuse in first level caches. STREX time-multiplexes the execution of similar transactions dynamically on a single core so that instructions fetched by one transaction are reused by all other transactions executing in the system as much as possible. STREX dynamically slices the execution of each transaction into cache-sized segments simply by observing when blocks are brought in the cache and when they are evicted. Experiments show that, when compared to baseline execution on 2 -- 16 cores, STREX consistently improves performance while reducing the number of L1 instruction and data misses by 37% and 14% on average, respectively. Finally, this paper proposes a practical hybrid technique that combines STREX and SLICC, thereby guaranteeing performance benefits regardless of the number of available cores and the workload's footprint.

2013

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MemorySense: Reconstructing and Ranking User Memories on Mobile Devices

Karl Aberer, Michele Catasta, Horia Radu, Jean-Eudes Marie Ranvier, Matteo Vasirani, Zhixian Yan

The richness of user-centric information gathered by modern devices can be used to keep track of memorable events, therefore acting as a prosthesis of the prone-to-forget human memory. We propose to combine virtual and physical sensors from mobile devices to infer digital memories of user activities in a semi-supervised fashion. In MemorySense, sensor data is processed by a space and energy efficient algorithm to recognize basic activities. We then use semantic reasoning to aggregate these activities into the digital equivalent of a human episodic memory.

Ieee2014

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Efficient spatial joins are pivotal for many applications and particularly important for geographical information systems or for the simulation sciences where scientists work with spatial models. Past research has primarily focused on disk-based spatial joins; efficient in-memory approaches, however, are important for two reasons: a) main memory has grown so large that many datasets fit in it and b) the in-memory join is a very time-consuming part of all disk-based spatial joins. In this paper we develop TOUCH, a novel in-memory spatial join algorithm that uses hierarchical data-oriented space partitioning, thereby keeping both its memory footprint and the number of comparisons low. Our results show that TOUCH outperforms known in-memory spatial-join algorithms as well as in-memory implementations of disk-based join approaches. In particular, it has a one order of magnitude advantage over the memory-demanding state of the art in terms of number of comparisons (i.e., pairwise object comparisons), as well as execution time, while it is two orders of magnitude faster when compared to approaches with a similar memory footprint. Furthermore, TOUCH is more scalable than competing approaches as data density grows.

2013

Chargement

STREX: Boosting Instruction Cache Reuse in OLTP Workloads Through Stratified Transaction Execution

Anastasia Ailamaki, Xin Tong, Pinar Tözün

2013