Publications associées à Compile time

DASS: Combining Dynamic & Static Scheduling in High-Level Synthesis

A central task in high-level synthesis is scheduling: the allocation of operations to clock cycles. The classic approach to scheduling is static, in which each operation is mapped to a clock cycle at compile-time, but recent years have seen the emergence o ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2022

Dr.Jit: A Just-In-Time Compiler for Differentiable Rendering

Wenzel Alban Jakob, Nicolas Julien Roussel, Delio Aleardo Vicini, Sébastien Nicolas Speierer

Dr.Jit is a new just-in-time compiler for physically based rendering and its derivative. Dr.Jit expedites research on these topics in two ways: first, it traces high-level simulation code (e.g., written in Python) and aggressively simplifies and specialize ...

ASSOC COMPUTING MACHINERY2022

Combining Dynamic & Static Scheduling in High-level Synthesis

Paolo Ienne, Lana Josipovic

ASSOC COMPUTING MACHINERY2020

Semantics-preserving inlining for metaprogramming

Martin Odersky, Sébastien Jean R Doeraene, Nicolas Alexander Stucki

Inlining is used in many different ways in programming languages: some languages use it as a compiler-directive solely for optimization, some use it as a metaprogramming feature, and others lay their design in-between. This paper presents inlining through ...

2020

RetroWrite: Statically Instrumenting COTS Binaries for Fuzzing and Sanitization

Mathias Josef Payer, Duo Xu

Analyzing the security of closed source binaries is currently impractical for end-users, or even developers who rely on third-party libraries. Such analysis relies on automatic vulnerability discovery techniques, most notably fuzzing with sanitizers enable ...

IEEE COMPUTER SOC2020

Mitsuba 2: A Retargetable Forward and Inverse Renderer

Wenzel Alban Jakob, Tizian Lucien Zeltner, Delio Aleardo Vicini, Merlin Eléazar Nimier-David

Modern rendering systems are confronted with a dauntingly large and growing set of requirements: in their pursuit of realism, physically based techniques must increasingly account for intricate properties of light, such as its spectral composition or polar ...

ASSOC COMPUTING MACHINERY2019

Shrink It or Shed It! Minimize the Use of LSQs in Dataflow Designs

Paolo Ienne, Andrea Guerrieri, Lana Josipovic, Atri Bhattacharyya

When applications have unpredictable memory accesses or irregular control flow, dataflow circuits overcome the limitations of statically scheduled high-level synthesis (HLS). If memory dependences cannot be determined at compile time, dataflow circuits rel ...

IEEE COMPUTER SOC2019

Compiler Generation for Performance-Oriented Embedded DSLs (Short Paper)

Christoph Koch, Amir Shaikhha, Vojin Jovanovic

In this paper, we present a framework for generating optimizing compilers for performance-oriented embedded DSLs (EDSLs). This framework provides facilities to automatically generate the boilerplate code required for building DSL compilers on top of the ex ...

ASSOC COMPUTING MACHINERY2019

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Compile time

DASS: Combining Dynamic & Static Scheduling in High-Level Synthesis

Dr.Jit: A Just-In-Time Compiler for Differentiable Rendering

Formal Verification of Rust with Stainless

Combining Dynamic & Static Scheduling in High-level Synthesis

Semantics-preserving inlining for metaprogramming

RetroWrite: Statically Instrumenting COTS Binaries for Fuzzing and Sanitization

Just-in-time performance without warm-up

Mitsuba 2: A Retargetable Forward and Inverse Renderer

Shrink It or Shed It! Minimize the Use of LSQs in Dataflow Designs

Compiler Generation for Performance-Oriented Embedded DSLs (Short Paper)

Graph Chatbot

Chattez avec Graph Search

DASS: Combining Dynamic & Static Scheduling in High-Level Synthesis

Just-in-time performance without warm-up

Dr.Jit: A Just-In-Time Compiler for Differentiable Rendering

RetroWrite: Statically Instrumenting COTS Binaries for Fuzzing and Sanitization

Formal Verification of Rust with Stainless

Combining Dynamic & Static Scheduling in High-level Synthesis

Compiler Generation for Performance-Oriented Embedded DSLs (Short Paper)

Mitsuba 2: A Retargetable Forward and Inverse Renderer

Shrink It or Shed It! Minimize the Use of LSQs in Dataflow Designs

Semantics-preserving inlining for metaprogramming