Concept
Comparison of instruction set architectures
Publications associées (69)
Exploring brain-inspired multi-core heterogeneous hardware templates for low-power biomedical embedded systems
The miniaturization of integrated circuits (ICs) and their higher performance and energy efficiency, combined with new machine learning algorithms and applications, have paved the way to intelligent, interconnected edge devices. In the medical domain, they ...
EPFL2023Building Chips Faster: Hardware-Compiler Co-Design for Accelerated RTL Simulation
The demise of Moore's Law and Dennard scaling has resulted in diminishing performance gains for general-purpose processors, and so has prompted a surge in academic and commercial interest for hardware accelerators.Specialized hardware has already redefined ...
EPFL2023Acceleration of Control Intensive Applications on Coarse-Grained Reconfigurable Arrays for Embedded Systems
David Atienza Alonso, Miguel Peon Quiros, Benoît Walter Denkinger
Embedded systems confront two opposite goals: low-power operation and high performance. The current trend to reach these goals is toward heterogeneous platforms, including multi-core architectures with heterogeneous cores and hardware accelerators. The lat ...
2023Micro-architectural Analysis of Database Workloads
Database workloads have significantly evolved in the past twenty years. Traditional database systems that are mainly used to serve Online Transactional Processing (OLTP) workloads evolved into specialized database systems that are optimized for particular ...
EPFL2021Relative stability toward diffeomorphisms indicates performance in deep nets
Matthieu Wyart, Mario Geiger, Leonardo Petrini, Alessandro Favero
Understanding why deep nets can classify data in large dimensions remains a challenge. It has been proposed that they do so by becoming stable to diffeomorphisms, yet existing empirical measurements support that it is often not the case. We revisit this qu ...
2021POSEIDON: Privacy-Preserving Federated Neural Network Learning
Jean-Pierre Hubaux, Juan Ramón Troncoso-Pastoriza, Jean-Philippe Léonard Bossuat, Apostolos Pyrgelis, David Jules Froelicher, Joao André Gomes de Sá e Sousa, Sinem Sav
In this paper, we address the problem of privacy-preserving training and evaluation of neural networks in an N-party, federated learning setting. We propose a novel system, POSEIDON, the first of its kind in the regime of privacy-preserving neural network ...
INTERNET SOC2021Multiplier Architectures: Challenges and Opportunities with Plasmonic-based Logic
Giovanni De Micheli, Mathias Soeken, Eleonora Testa, Odysseas Zografos
Emerging technologies such as plasmonics and photonics are promising alternatives to CMOS for high throughput applications, thanks to their waveguide's low power consumption and high speed of computation. Besides these qualities, these novel technologies a ...
2020Multiplier Architectures: Challenges and Opportunities with Plasmonic-based Logic
Giovanni De Micheli, Mathias Soeken, Eleonora Testa, Odysseas Zografos
Emerging technologies such as plasmonics and photonics are promising alternatives to CMOS for high throughput applications, thanks to their waveguide's low power consumption and high speed of computation. Besides these qualities, these novel technologies a ...
IEEE2020Stretch: Balancing QoS and Throughput for Colocated Server Workloads on SMT Cores
Boris Robert Grot, Siddharth Gupta
In a drive to maximize resource utilization, today's datacenters are moving to colocation of latency-sensitive and batch workloads on the same server. State-of-the-art deployments, such as those at Google, colocate such diverse workloads even on a single S ...
IEEE2019CoreNEURON : An Optimized Compute Engine for the NEURON Simulator
Felix Schürmann, James Gonzalo King, Michael Lee Hines, Pramod Shivaji Kumbhar, Aleksandr Ovcharenko, Jérémy Pierre Benoit Fouriaux
The NEURON simulator has been developed over the past three decades and is widely used by neuroscientists to model the electrical activity of neuronal networks. Large network simulation projects using NEURON have supercomputer allocations that individually ...
2019