Concept

Silicon Valley

Publications associées (43)

Characterization and Implementation of Fault-Tolerant Vertical Links for 3-D Networks-on-Chip

Luca Benini, Federico Angiolini, Subhasish Mitra

Through silicon vias (TSVs) provide an efficient way to support vertical communication among different layers of a vertically stacked chip, enabling scalable 3-D networks-on-chip (NoC) architectures. Unfortunately, low TSV yields significantly impact the f ...

2011

Rhodium(I)-Catalyzed 1,4-Silicon Shift of Unactivated Silanes from Aryl to Alkyl: Enantioselective Synthesis of Indanol Derivatives

Nicolai Cramer

Enantioselective Rh-promoted activation and 1,4-positional swap of unactivated tetraorganosilanes, e.g., 1-ethyl-3-methyl-3-(2-(trimethylsilyl)phenyl)cyclobutanol (I) to give (1S,3S)-1-ethyl-3-methyl-3((trimethylsilyl)methyl)indanol (II). E.g., reaction of ...

Wiley-VCH Verlag GmbH & Co. KGaA2010

Tunable, high aspect ratio pillars on diverse substrates using copolymer micelle lithography: an interesting platform for applications

Jürgen Brugger, Cyrille Hibert, Sivashankar Krishnamoorthy

We demonstrate the use of copolymer micelle lithography using polystyrene-block-poly(2-vinylpyridine) reverse micelle thin films in their as-coated form to create nanopillars with tunable dimensions and spacing, on different substrates such as silicon, sil ...

2008

Advanced receiver algorithms for MIMO wireless communications

Andreas Peter Burg, Christoph Studer

We describe the VLSI implementation of MIMO detectors that exhibit close-to optimum error-rate performance, but still achieve high throughput at low silicon area. In particular algorithms and VLSI architectures for sphere decoding (SD) and K-best detection ...

Ieee Service Center, 445 Hoes Lane, Po Box 1331, Piscataway, Nj 08855-1331 Usa2006

Transfer of small structures by bonding

Luis Guillermo Villanueva Torrijo

The work presented in this paper deals with the bonding of small structures, down to 1 mu m. Its aim is to evaluate the dimensional limits of anodic bonding between silicon and pyrex 7740 glass. Test structures consisting in silicon pillars with controlled ...

2006

Transfer of small structures by bonding

Luis Guillermo Villanueva Torrijo

2006

A buffer-sizing Algorithm for Networks on Chip using TDMA and credit-based end-to-end Flow Control

Giovanni De Micheli, Srinivasan Murali

When designing a System-on-Chip (SoC) using a Network-on- Chip (NoC), silicon area and power consumption are two key elements to optimize. A dominant part of the NoC area and power consumption is due to the buffers in the Network Interfaces (NIs) needed to ...

2006

Low-Power Adaptive Bias/Clock Generator Using 0.18um CMOS Technology for Multi-Core Continuous Voltage and Frequency Scaling

Yusuf Leblebici, Zeynep Toprak Deniz

This paper presents a continuous voltage and frequency scaling approach achieving lower transition (both energy and time) overheads implied by changing voltage levels, at a very low power dissipation and silicon area cost for multi-processor systems with i ...

2005

Miniature lamellar grating interferometer based on silicon technology

Nico de Rooij, Hans Peter Herzig, Wilfried Noell, Roland Michaely

We present a lamellar grating interferometer realized with microelectromechanical system technology. It is used as a time-scanning Fourier-transform spectrometer. The motion is carried out by an electrostatic comb drive actuator fabricated by silicon micro ...

2004

Simulation and characterization of piezoelectric micromachined ultrasonic transducers (PMUT's) based on PZT/SOI membranes

Paul Muralt, Nicolas Ledermann

Piezoelectric micromachined ultrasonic transducers for airborne and immersed applications working in the frequency range from 20 kHz in liquid to 750 kHz in air have been fabricated and characterized, as well as simulated by finite element modelling. The b ...

2003

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