Publications associées à Multi-chip module

A Unified Online Directed Acyclic Graph Flow Manager for Multicore Schedulers

Numerous Directed-Acyclic Graph (DAG) schedulers have been developed to improve the energy efficiency of various multi-core systems. However, the DAG monitoring modules proposed by these schedulers make a priori assumptions about the workload and relations ...

IEEE2014

Finite state encoders and decoders for vector signaling codes

Mohammad Amin Shokrollahi, Harm Cronie

In a chip-to-chip communication system and apparatus, a set of physical signals to be conveyed over a communication bus is provided, and mapped to a codeword of a vector signaling code using the physical signals and a state information, wherein a codeword ...

2014

A Die-Level Post-CMOS Processing Protocol for Multi-Layer 3D Integration

Davide Sacchetto, Seniz Esra Küçük, Yusuf Leblebici, Clemens Benedict Nyffeler

In this work, a chip-level post-CMOS processing protocol for 3D integration is presented to achieve multilayer stacking. This protocol includes TSV formation on the top chip, bonding the chips on top of each other, and finally the electrical connection pro ...

2014

Multisite monitoring of choline using biosensor microprobe arrays in combination with CMOS circuitry

Nico de Rooij, Peter Van der Wal, Olivier Frey

A miniature device enabling parallel in vivo detection of the neurotransmitter choline in multiple brain regions of freely behaving rodents is presented. This is achieved by combining a biosensor microprobe array with a custom-developed CMOS chip. Each sil ...

De Gruyter2014

Low Power 3D Serial TSV Link for High Bandwidth Cross-Chip Communication

Giovanni De Micheli, Yusuf Leblebici, Alessandro Cevrero, Giulia Beanato

3D-ICs based on TSV technology provide high bandwidth inter-chip connections. The drawback is that most of the existing TSVs consume a large amount of silicon real estate. We present circuit-level design and analysis of area efficient, low power, high-data ...

2014

Low Power 3D Serial TSV Link for High Bandwidth Cross-Chip Communication

Giovanni De Micheli, Yusuf Leblebici, Alessandro Cevrero, Giulia Beanato

2014

Wafer-fused VECSELs emitting in the 1310 nm waveband

Elyahou Kapon, Nicolas Volet, Alexandru Mereuta, Vladimir Iakovlev, Alexei Sirbu, Andrei Caliman, Kamil Pawel Pierscinski

Optically pumped wafer fused 1310 nm VECSELs have the advantage of high output power and wavelength agility. Gain mirrors in these lasers are formed by direct bonding of InAlGaAs/InP active cavities to Al(Ga) As/GaAs DBRs. We present for the first time Wat ...

Spie-Int Soc Optical Engineering2014

Ultra-Low Power Multicore Architecture For Parallel Biomedical Signal Processing

David Atienza Alonso, Andreas Peter Burg, Jeremy Hugues-Felix Constantin, Ahmed Yasir Dogan

A multi-core architecture with ultra-low power consumption is needed for a wide variety of applications, especially in the bio-medical domain. In this patent, an ultra-low power multi-core architecture is presented: it is composed of one or more cores, sev ...

2014

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Multi-chip module

A Unified Online Directed Acyclic Graph Flow Manager for Multicore Schedulers

A Unified Online Directed Acyclic Graph Flow Manager for Multicore Schedulers

Finite state encoders and decoders for vector signaling codes

A Die-Level Post-CMOS Processing Protocol for Multi-Layer 3D Integration

Multisite monitoring of choline using biosensor microprobe arrays in combination with CMOS circuitry

Design of Digital SoC for Operation at High Temperatures

Low Power 3D Serial TSV Link for High Bandwidth Cross-Chip Communication

Low Power 3D Serial TSV Link for High Bandwidth Cross-Chip Communication

Wafer-fused VECSELs emitting in the 1310 nm waveband

Ultra-Low Power Multicore Architecture For Parallel Biomedical Signal Processing

Graph Chatbot

Chattez avec Graph Search

A Unified Online Directed Acyclic Graph Flow Manager for Multicore Schedulers

A Unified Online Directed Acyclic Graph Flow Manager for Multicore Schedulers

Design of Digital SoC for Operation at High Temperatures

Multisite monitoring of choline using biosensor microprobe arrays in combination with CMOS circuitry

A Die-Level Post-CMOS Processing Protocol for Multi-Layer 3D Integration

Low Power 3D Serial TSV Link for High Bandwidth Cross-Chip Communication

Wafer-fused VECSELs emitting in the 1310 nm waveband

Ultra-Low Power Multicore Architecture For Parallel Biomedical Signal Processing

Low Power 3D Serial TSV Link for High Bandwidth Cross-Chip Communication

Finite state encoders and decoders for vector signaling codes