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A multi-core architecture with ultra-low power consumption is needed for a wide variety of applications, especially in the bio-medical domain. In this patent, an ultra-low power multi-core architecture is presented: it is composed of one or more cores, several (one or more] shared multi-banked instruction and data memories, and flexible crossbar interconnects. The interconnect includes a selective broadcasting mechanism, enabling coordinated multiple accesses to the shared memories, thus energy savings in the memory hierarchy and in the interconnects. The memory hierarchy enables power gating of the unused banks to lower leakage power. The core instruction set of the novel architecture has been customized to exploit the specific features of bio-signal events, as well as the highly parallel computation opportunities of bio-signal processing characteristics. In addition to near threshold computing, the proposed architecture also exploits other advanced low-power features, which lead to further energy savings. The architecture has a synchronization method and unit that allows power- efficient handling of data dependencies when code is parallelized across the multiple processing cores.
David Atienza Alonso, Alexandre Sébastien Julien Levisse, Miguel Peon Quiros, Simone Machetti, Pasquale Davide Schiavone
Edoardo Charbon, Andrei Ardelean
David Atienza Alonso, Giovanni Ansaloni, Alireza Amirshahi