Vector signaling codes providing guaranteed numbers of transitions per unit transmission interval are described, along with methods and systems for their generation and use. The described architecture may include multiple communications sub-systems, each h ...
2016
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Polar codes are an exciting new class of error correcting codes that achieve the symmetric capacity of memoryless channels. Many decoding algorithms were developed and implemented, addressing various application requirements: from error-correction performa ...
We present an RF-driven two-stage 40 GHz RZ pulse source based on self-phase modulation and a fiber optic parametric amplifier, for generation of 1.1 ps pulses, and demonstrate generation of OTDM data up to 320 Gb/s. ...
Orthogonal differential vector signaling codes are described which support encoded sub-channels allowing transport of distinct but temporally aligned data and clocking signals over the same transport medium. Embodiments providing enhanced LPDDR interfaces ...
In this paper, we consider the problem of cross-chain payment whereby customers of different escrows-implemented by a bank or a blockchain smart contract-successfully transfer digital assets without trusting each other. Prior to this work, cross-chain paym ...
A challenging problem related to the design of polar codes is "robustness against channel parameter variations'', as stated in Arıkan's original work. In this paper, we describe how the problem of robust polar code design can be viewed as a mismatch decodi ...
An efficient communications apparatus is described for a vector signaling code to transport data and optionally a clocking signal between integrated circuit devices. Methods of designing such apparatus and their associated codes based on a new metric herei ...
We present a clock-offset tracking algorithm for impulse-radio ultra-wide band (IR-UWB) energy-detection receivers. There is a complexity versus performance trade-off for the design of IR-UWB energy-detection receivers: Extremely low-complexity energy-dete ...
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Clocking power, including both clock distribution and registers, has long been one of the primary factors in the total power consumption of many digital systems. One straightforward approach to reduce this power consumption is to apply dual-edge-triggered ...
An efficient communications apparatus is described for a vector signaling code to transport data and optionally a clocking signal between integrated circuit devices. Methods of designing such apparatus and their associated codes based on a new metric herei ...