Concept

IBM RS64

Résumé
The IBM RS64 is a family of microprocessors introduced in the mid 1990s, and used in IBM's RS/6000 and AS/400 servers. These microprocessors implement the "Amazon", or "PowerPC-AS", instruction set architecture (ISA). Amazon is a superset of the PowerPC instruction set, with the addition of special features not in the PowerPC specification, mainly derived from POWER2 and the original AS/400 processor, and has been 64-bit from the start. The processors in this family are optimized for commercial workloads (integer performance, large caches, branches) and do not feature the strong floating point performance of the processors in the POWER family, its sibling. The RS64 family was phased out soon after the introduction of the POWER4, which was developed to unite the RS64 and POWER families. In 1990, the AS/400 engineering team at IBM Rochester began work on a new architecture known as C-RISC (Commercial RISC) to replace the IMPI architecture of the AS/400. C-RISC was an evolution of the IMPI instruction set, extending the address space to 96 bits and adding some RISC instructions to speed up the more computationally intensive commercial applications that were being put on AS/400s. IBM president Jack Kuehler wanted them to use PowerPC, but they resisted, arguing that the existing 32/64-bit PowerPC instruction set would not enable a viable transition for OS/400 software and that the existing instruction set required extensions for the commercial applications on the AS/400. At Kuehler's insistence, a team at Rochester led by Frank Soltis investigated the feasibility of extending the PowerPC instruction set to support the needs of the AS/400 platform. These extensions became known as Amazon and were selected by IBM executive management for further development over continued development of C-RISC. At the same time, the RS/6000 developers were broadly expanding their product line to include systems which spanned from low-end workstations, to mainframe competitor-large enterprise SMP systems, to clustered RS/6000-SP2 supercomputing systems.
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