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Publications associées (118)

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Current-driven switching of exchange biased spin-valve giant magnetoresistive nanopillars using a conducting nanoprobe

Jürgen Brugger, Johannes Steen

An array of exchange biased spin-valve giant-magnetoresistance nanopillars was fabricated and the current I dependence of the resistance R was investigated using an electrically conducting atomic-force microscope (AFM) probe contact at room temperature. We ...

2004

Semiconductor device

Serguei Okhonin

A semiconductor device such as a DRAM memory device is disclosed. A substrate 12 of semiconductor material is provided with energy band modifying means in the form of a box region 38 and is covered by an insulating layer 14. A semiconductor layer 16 has so ...

2004

Reducing Memory Accesses with a System-Level Design Methodology in Customized Dynamic Memory Management

David Atienza Alonso

Currently, portable consumer embedded devices are increasing more and more their capabilities and can now implement new algorithms (e.g. multimedia and wireless protocols) that a few years ago were resewed only for powerful workstations. Unfortunately, the ...

IEEE Computer Society2004

Memory refreshing device

Serguei Okhonin

The cell assembly (10) refreshment method has a mechanism (22) acting simultaneously on all the cells. The same refreshment signal is applied having a differencing effect following each cell state. ...

2003

Reducing leakage in a high-performance deep-submicron instruction cache

Babak Falsafi

Deep-submicron CMOS designs maintain high transistor switching speeds by scaling down the supply voltage and proportionately reducing the transistor threshold voltage. Lowering the threshold voltage increases leakage energy dissipation due to subthreshold ...

2001

Gated-Vdd: a circuit technique to reduce leakage in deep- submicron cache memories

Babak Falsafi

Deep-submicron CMOS designs have resulted in large leakage energy dissipation in microprocessors. While SRAM cells in on-chip cache memories always contribute to this leakage, there is a large variability in active cell usage both within and across applica ...

2000

Is SC+ILP=RC?

Babak Falsafi

Sequential consistency (SC) is the simplest programming interface for shared-memory systems but imposes program order among all memory operations, possibly precluding high performance implementations. Release consistency (RC), however, enables the highest ...

1999

Compact, integrated dynamic holographic memory with refreshed holograms

Demetri Psaltis

An innovative architecture for compact, integrated volume holographic memories is described. It is based on phase-conjugate readout and on a modulator-detector-memory array implemented in a silicon integrated circuit. The lensless memory module sustains dy ...

1997