Concept
Intel MIC
Publications associées (42)
Full System Exploration of On-Chip Wireless Communication on Many-Core Architectures
David Atienza Alonso, Marina Zapater Sancho, Giovanni Ansaloni, Rafael Medina Morillas, Yasir Mahmood Qureshi, Joshua Alexander Harrison Klein
In order to develop sustainable and more powerful information technology (IT) infrastructures, the challenges posed by the "memory wall" are critical for the design of high-performance and high-efficiency many-core computing systems. In this context, recen ...
2022How Many CPU Cores is an FPGA Worth? Lessons Learned from Accelerating String Sorting on a CPU-FPGA System
Paolo Ienne, Mikhail Asiatici, Damian Maiorano
String sorting is a fundamental kernel of string matching and database index construction; yet, it has not been studied as extensively as fixed-length keys sorting. Because processing variable-length keys in hardware is challenging, it is no surprise that ...
SPRINGER2021FPGAs in the Datacenters: the Case of Parallel Hybrid Super Scalar String Sample Sort
Paolo Ienne, Mikhail Asiatici, Damian Maiorano
String sorting is an important part of database and MapReduce applications; however, it has not been studied as extensively as sorting of fixed-length keys. Handling variable-length keys in hardware is challenging and it is no surprise that no string sorte ...
IEEE COMPUTER SOC2020CoreNEURON : An Optimized Compute Engine for the NEURON Simulator
Felix Schürmann, James Gonzalo King, Michael Lee Hines, Pramod Shivaji Kumbhar, Aleksandr Ovcharenko, Jérémy Pierre Benoit Fouriaux
The NEURON simulator has been developed over the past three decades and is widely used by neuroscientists to model the electrical activity of neuronal networks. Large network simulation projects using NEURON have supercomputer allocations that individually ...
2019GPU-Accelerated Finite Volume Particle Simulation of Free Jet Deviation by Multi-jet Rotating Pelton Runner
Numerical simulation of Pelton turbine hydrodynamics is helpful to identify the energy loss mechanisms in the runner and minimize their effect. However, it is a challenging task that involves handling the unsteady free surface flow and moving boundaries re ...
EPFL2019Leveraging a Cluster-Booster Architecture for Brain-Scale Simulations
Felix Schürmann, James Gonzalo King, Michael Lee Hines, Pramod Shivaji Kumbhar, Aleksandr Ovcharenko
The European Dynamical Exascale Entry Platform (DEEP) is an example of a new type of heterogeneous supercomputing architecture that include both a standard multicore-based "Cluster" used to run less scalable parts of an application, and an Intel MIC-based ...
Springer Int Publishing Ag2016