Publications associées (21)

Intermediate Address Space: virtual memory optimization of heterogeneous architectures for cache-resident workloads

David Atienza Alonso, Marina Zapater Sancho, Luis Maria Costero Valero, Darong Huang, Qunyou Liu

The increasing demand for computing power and the emergence of heterogeneous computing architectures have driven the exploration of innovative techniques to address current limitations in both the compute and memory subsystems. One such solution is the use ...
2024

Low-Cost Side-Channel Secure Standard 6T-SRAM-Based Memory With a 1% Area and Less Than 5% Latency and Power Overheads

Robert Giterman

Side-channel attacks constitute a concrete threat to IoT systems-on-a-chip (SoCs). Embedded memories implemented with 6T SRAM macrocells often dominate the area and power consumption of these SoCs. Regardless of the computational platform, the side-channel ...
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2021

Organic-inorganic hybrid tandem bulk heterojunction ITO/A1Pc:H2Pc/n-Si/Al photoelectric cell

Ulf Anders Hagfeldt

Organic-inorganic hybrid tandem heterojunction ITO/AIPc:H2Pc/n-Si/Al photoelectric cell was fabricated by a pressing technology using preliminary vapor deposited bulk heterojunction films of mixed aluminum-phthalocyanine (AIPc) and metal free phthalocyanin ...
Natl Inst Optoelectronics2017

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