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This paper presents a methodology of a basic analog blocks retargeting from bulk to fully depleted (FD) SOI technology. The design methodology is generally not related to the model used for the circuit simulations. However, the proposed one is closely link ...
The objective of this paper is to assess the capability of existing lighting simulation methods to predict the performance of Complex Fenestration Systems (CFS), whose potential in daylight and sunlight control make them an increasingly popular alternative ...
With the work reported in this manuscript we have essentially contributed to the electrical characterization and modelling of high voltage MOSFETs, more particularly DMOS architectures such as X-DMOS and L-DMOS able to sustain voltages ranging from 30V to ...
Current simulation-sampling techniques construct accurate model state for each measurement by continuously warming large microarchitectural structures (e.g., caches and the branch predictor) while functionally simulating the billions of instructions betwee ...
This paper presents the basis of the modeling of the MOS transistor for circuit simulation at RF. A physical equivalent circuit that can easily be implemented as a Spice subcircuit is first derived. The subcircuit includes a substrate network that accounts ...
To analyze new, parallel computers, developers must rapidly simulate designs running realistic workloads. Historically, direct execution and a parallel host have accelerated simulations, although these techniques have typically lacked portability. Through ...
Current Systems-On-Chip execute applications that demand extensive parallel processing. Networks-On-Chip (NoC) provide a structured way of realizing interconnections on silicon, and obviate the limitations of bus-based solutions. NoCs can have regular or a ...
Dynamically allocating computing nodes to parallel applications is a promising technique for improving the utilization of cluster resources. We introduce the concept of dynamic efficiency which expresses the resource utilization efficiency as a function of ...
Current systems-on-chip (SoC) execute applications that demand extensive parallel processing. Networks-on-chip (NoC) provide a structured way of realizing interconnections on silicon, and obviate the limitations of bus-based solutions. NoC can have regular ...
The new focus on commercial workloads in simulation studies of server systems has caused a drastic increase in the complexity and decrease in the speed of simulation tools. The complexity of a large-scale full-system model makes development of a monolithic ...