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Publications associées (13)

Territorial reading in Ukraine’s recovery policy: conceptual and methodological gaps

Approaches to Ukraine’s wartime and anticipated post-war reconstruction and recovery, united under a general slogan of ‘build back better’, are currently reflected in multiple policies, regulations, planning tools and data registers, as well as showcased t ...

2023

SoK: Shining Light on Shadow Stacks

Mathias Josef Payer, Xiangyu Zhang

Control-Flow Hijacking attacks are the dominant attack vector against C/C++ programs. Control-Flow Integrity (CFI) solutions mitigate these attacks on the forward edge, i.e., indirect calls through function pointers and virtual calls. Protecting the backwa ...

IEEE COMPUTER SOC2019

Linebacker: Preserving Victim Cache Lines in Idle Register Files of GPUs

Yunho Oh

Modern GPUs suffer from cache contention due to the limited cache size that is shared across tens of concurrently running warps. To increase the per-warp cache size prior techniques proposed warp throttling which limits the number of active warps. Warp thr ...

ASSOC COMPUTING MACHINERY2019

QUASII: QUery-Aware Spatial Incremental Index

Anastasia Ailamaki, Darius Sidlauskas, Thomas Heinis, Mirjana Pavlovic

With large-scale simulations of increasingly detailed models and improvement of data acquisition technologies, massive amounts of data are easily and quickly created and collected. Traditional systems require indexes to be built before analytic queries can ...

2018

An Overlap-Contention Free True-Single-Phase Clock Dual-Edge-Triggered Flip-Flop

Andreas Peter Burg, Adam Shmuel Teman, Andrea Bonetti

Dual-edge-triggered (DET) synchronous operation is a very attractive option for low-power, high-performance designs. Compared to conventional single-edge synchronous systems, DET operation is capable of providing the same throughput at half the clock frequ ...

2015

Sub-Logarithmic Test-and-Set Against a Weak Adversary

Dan Alistarh

A randomized implementation is given of a test-and-set register with O(log log it) individual step complexity and O(n) total step complexity against an oblivious adversary. The implementation is linearizable and multi-shot, and shows an exponential complex ...

Springer-Verlag Berlin2011

Reducing the Energy Dissipation of the Issue Queue by Exploiting Narrow Immediate Operands

Yusuf Onur Koçberber, Ilknur Cansu Kaynak

In contemporary superscalar microprocessors, issue queue is a considerable energy dissipating component due its complex scheduling logic. In addition to the energy dissipated for scheduling activities, read and write lines of the issue queue entries are al ...

2010

Methodology for the Digital Calibration of Analog Circuits and Systems Using Sub-binary Radix DACs

Maher Kayal, Marc Pastre

This paper presents a methodology for digitally calibrating analog circuits and systems. Based on the detection of an imperfection by a simple comparator, a successive approximations algorithm tunes a compensation current. The latter is generated by a sub- ...

2010

Methodology for the Digital Calibration of Analog Circuits and Systems Using Sub-binary Radix DACs

Maher Kayal, Marc Pastre

Ieee Service Center, 445 Hoes Lane, Po Box 1331, Piscataway, Nj 08855-1331 Usa2009

A microprocessor having at least one application specific functional unit and method to design same

Paolo Ienne

Customisable embedded processors that are available on the market make it possible for designers to speed up execution of applications by using Application-specific Functional Units (AFUs), implementing Instruction-Set Extensions (ISEs). Furthermore, techn ...

2008

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