Mario PaoloneMario Paolone received the M.Sc. (with honors) and the Ph.D. degree in electrical engineering from the University of Bologna, Italy, in 1998 and 2002, respectively. In 2005, he was appointed assistant professor in power systems at the University of Bologna where he was with the Power Systems laboratory until 2011. In 2010, he received the Associate Professor eligibility from the Politecnico di Milano, Italy. Since 2011 he joined the Swiss Federal Institute of Technology, Lausanne, Switzerland, where he is now Full Professor, Chair of the Distributed Electrical Systems laboratory and Head of the Swiss Competence Center for Energy Research (SCCER) FURIES (Future Swiss Electrical infrastructure). He was co-chairperson of the technical programme committees of the 9th edition of the International Conference of Power Systems Transients (IPST 2009) and of the 2016 Power Systems Computation Conference (PSCC 2016). He was chair of the technical programme committee of the 2018 Power Systems Computation Conference (PSCC 2018). In 2013, he was the recipient of the IEEE EMC Society Technical Achievement Award. He was co-author of several papers that received the following awards: best IEEE Transactions on EMC paper award for the year 2017, in 2014 best paper award at the 13th International Conference on Probabilistic Methods Applied to Power Systems, Durham, UK, in 2013 Basil Papadias best paper award at the 2013 IEEE PowerTech, Grenoble, France, in 2008 best paper award at the International Universities Power Engineering Conference (UPEC). He was the founder Editor-in-Chief of the Elsevier journal Sustainable Energy, Grids and Networks and was Associate Editor of the IEEE Transactions on Industrial Informatics. His research interests are in power systems with particular reference to real-time monitoring and operation, power system protections, power systems dynamics and power system transients. Mario Paolone is author or coauthor of over 300 scientific papers published in reviewed journals and international conferences.
Alfred RuferOriginaire de Diessbach (BE), Alfred Rufer est né en 1951. Il obtient en 1976 le diplôme d'ingénieur électricien de l'EPFL et poursuit son activité dans le même établissement en tant qu'assistant à la chaire d'électronique industrielle. En 1993, il est nommé professeur-assistant au Laboratoire d'électronique industrielle. Au début 1996, il est nommé professeur extraordinaire. En 1978, il débute son activité dans l'industrie de l'électronique de grande puissance à la société ABB, Asea Brown Boveri à Turgi, où il contribue au développement d'entraînements réglés à fréquence variable. Dès 1985, il exerce la fonction d'assistant technique et de chef de groupe. De 1988 à 1991, il poursuit le développement de nouveaux systèmes d'électronique de puissance dans différents domaines d'application. A. Rufer est l'auteur et co-auteur de plusieurs demandes de brevet, ainsi que de plusieurs publications. De 1991 à 1992, il est chef d'un département de développement d'appareils d'électronique de réglage et de commande pour l'électronique de puissance. Durant son activité professionnelle dans l'industrie, il participe activement à l'enseignement technique dans plusieurs écoles d'ingénieurs.
David Atienza AlonsoDavid Atienza Alonso is an associate professor of EE and director of the Embedded Systems Laboratory (ESL) at EPFL, Switzerland. He received his MSc and PhD degrees in computer science and engineering from UCM, Spain, and IMEC, Belgium, in 2001 and 2005, respectively. His research interests include system-level design methodologies for multi-processor system-on-chip (MPSoC) servers and edge AI architectures. Dr. Atienza has co-authored more than 350 papers, one book, and 12 patents in these previous areas. He has also received several recognitions and award, among them, the ICCAD 10-Year Retrospective Most Influential Paper Award in 2020, Design Automation Conference (DAC) Under-40 Innovators Award in 2018, the IEEE TCCPS Mid-Career Award in 2018, an ERC Consolidator Grant in 2016, the IEEE CEDA Early Career Award in 2013, the ACM SIGDA Outstanding New Faculty Award in 2012, and a Faculty Award from Sun Labs at Oracle in 2011. He has also earned two best paper awards at the VLSI-SoC 2009 and CST-HPCS 2012 conference, and five best paper award nominations at the DAC 2013, DATE 2013, WEHA-HPCS 2010, ICCAD 2006, and DAC 2004 conferences. He serves or has served as associate editor of IEEE Trans. on Computers (TC), IEEE Design & Test of Computers (D&T), IEEE Trans. on CAD (T-CAD), IEEE Transactions on Sustainable Computing (T-SUSC), and Elsevier Integration. He was the Technical Program Chair of DATE 2015 and General Chair of DATE 2017. He served as President of IEEE CEDA in the period 2018-2019 and was GOLD member of the Board of Governors of IEEE CASS from 2010 to 2012. He is a Distinguished Member of ACM and an IEEE Fellow.
Jean-Yves Le BoudecJean-Yves Le Boudec is full professor at EPFL and fellow of the IEEE. He graduated from Ecole Normale Superieure de Saint-Cloud, Paris, where he obtained the Agregation in Mathematics in 1980 (rank 4) and received his doctorate in 1984 from the University of Rennes, France. From 1984 to 1987 he was with INSA/IRISA, Rennes. In 1987 he joined Bell Northern Research, Ottawa, Canada, as a member of scientific staff in the Network and Product Traffic Design Department. In 1988, he joined the IBM Zurich Research Laboratory where he was manager of the Customer Premises Network Department. In 1994 he joined EPFL as associate professor. His interests are in the performance and architecture of communication systems. In 1984, he developed analytical models of multiprocessor, multiple bus computers. In 1990 he invented the concept called "MAC emulation" which later became the ATM forum LAN emulation project, and developed the first ATM control point based on OSPF. He also launched public domain software for the interworking of ATM and TCP/IP under Linux. He proposed in 1998 the first solution to the failure propagation that arises from common infrastructures in the Internet. He contributed to network calculus, a recent set of developments that forms a foundation to many traffic control concepts in the internet. He earned the Infocom 2005 Best Paper award, with Milan Vojnovic, for elucidating the perfect simulation and stationarity of mobility models, the 2008 IEEE Communications Society William R. Bennett Prize in the Field of Communications Networking, with Bozidar Radunovic, for the analysis of max-min fairness and the 2009 ACM Sigmetrics Best Paper Award, with Augustin Chaintreau and Nikodin Ristanovic, for the mean field analysis of the age of information in gossiping protocols. He is or has been on the program committee or editorial board of many conferences and journals, including Sigcomm, Sigmetrics, Infocom, Performance Evaluation and ACM/IEEE Transactions on Networking. He co-authored the book "Network Calculus" (2001) with Patrick Thiran and is the author of the book "Performance Evaluation of Computer and Communication Systems" (2010).
Rahul Kumar GuptaRahul Gupta completed his B.Tech in electrical engineering at NIT Rourkela, India in 2014. From 2015 to 2016, he worked as research assistant on micro-energy harvesting at NUS Singapore. In 2018, he received his M.Sc degree in electrical engineering with orientation in smart grids technology at EPFL Lausanne, Switzerland. He received Zanelli: technologie et développement durable prize 2018 for his master project in the field of sustainable development. Currently, he is pursuing his Ph.D. degree at the Distributed Electrical Systems Laboratory, EPFL. His research interests include model predictive control, distributed optimization and data-driven control of the active distribution networks in the presence of uncertainties.
Jan Van HerleNé à Anvers, Belgique, 1966. En Suisse depuis 1983. Naturalisé Suisse en 2004 par persuasion de la culture suisse démocratique et participative 'bottom-up'. Pas de double nationalité. Conseiller communal durant 2 mandats de 5 ans de 2006 à 2016.
1987 : Chimiste de l'Université de Bâle (CH).
1988 : Post-grade informatique de l'Ecole d'Ingénieurs de Bâle.
1989 : Stage industriel chez ABB à Baden (CH).
1990-1993 : Thesè EPFL
1994-1995 : Postdoc au Japon (Tokyo).
1996-2000 : Chercheur à l'EPFL, Dpt. Chimie, responsable de groupe.
1998-2000 : Master en Energy Technology, EPFL.
2000 : Cofondateur de HTceramix SA (EPFL spin-off), à Yverdon (actuellement 12 employés). La maison mère SOLIDpower en Italie, qui a acheté notre technologie en 2007, emploie 250 personnes et a levé 70 MCHF.
2000-2012 : 1er Assistant et chargé de cours en STI-IGM. Promu à MER en 2008.
2013-présent: MER responsable d'unité.
Output : 135 publications, 120 papiers de conférence, 15 théses de doctorat, 4 thèses en cours, 37 thèses de master. Facteur h-42, >5000 citations.
Fonds levés jusqu'à présent >19 MCHF.
5 langues couramment (néerlandais, français, allemand (y.c. suisse-allemand), anglais, espagnol).