Publications associées à Scratchpad memory

Multi-Ported GC-eDRAM Bitcell with Dynamic Port Configuration and Refresh Mechanism

Embedded memories occupy an increasingly dominant part of the area and power budgets of modern systems-on-chips (SoCs). Multi-ported embedded memories, commonly used by media SoCs and graphical processing units, occupy even more area and consume higher pow ...

MDPI2024

Chaosity: Understanding Contemporary NUMA-architectures

Anastasia Ailamaki, Viktor Sanca, Hamish Mcniece Hill Nicholson, Andreea Nica, Syed Mohammad Aunn Raza

Modern hardware is increasingly complex, requiring increasing effort to understand in order to carefully engineer systems for optimal performance and effective utilization. Moreover, established design principles and assumptions are not portable to modern ...

2023

WR2A: A Very-Wide-Register Reconfigurable-Array Architecture for Low-Power Embedded Devices

David Atienza Alonso, Miguel Peon Quiros, Benoît Walter Denkinger

Edge-computing requires high-performance energy-efficient embedded systems. Fixed-function or custom accelerators, such as FFT or FIR filter engines, are very efficient at implementing a particular functionality for a given set of constraints. However, the ...

2022

Decentralized in-order execution of a sequential task-based code for shared-memory architectures

Charly Nicolas Lucien Castes

The hardware complexity of modern machines makes the design of adequate programming models crucial for jointly ensuring performance, portability, and productivity in high-performance computing (HPC). Sequential task-based programming models paired with adv ...

IEEE COMPUTER SOC2022

Performance Estimation of High-Level Dataflow Program on Heterogeneous Platforms

Marco Mattavelli, Simone Casale Brunet, Aurélien François Gilbert Bloch

The performance of programs written in languages following the dataflow model of computation (MoC) largely depends on the configuration (partitioning, mapping, scheduling, buffer dimensioning) chosen during the synthesis stages. Furthermore, this programmi ...

2022

A 24 kb Single-Well Mixed 3T Gain-Cell eDRAM with Body-Bias in 28 nm FD-SOI for Refresh-Free DSP Applications

Andreas Peter Burg, Robert Giterman, Cosimo Aprile, Yusuf Leblebici, Andrea Bonetti, Jonathan Emmanuel D Narinx, Nicolas Claude Frigerio

Logic-compatible gain-cell embedded DRAM (GC-eDRAM) is an emerging alternative to conventional SRAM for memory-dominated system-on-chip (SoC) designs due to its high-density, low-power, and two-ported operation. Although GCs have a limited data retention t ...

IEEE2019

Processing Megapixel Images with Deep Attention-Sampling Models

François Fleuret, Angelos Katharopoulos

Existing deep architectures cannot operate on very large signals such as megapixel images due to computational and memory constraints. To tackle this limitation, we propose a fully differentiable end-to-end trainable model that samples and processes only a ...

Idiap2019

Placement of Virtual Containers on NUMA systems: A Practical and Comprehensive Model

Baptiste Joseph Eustache Lepers

Our work addresses the problem of placement of threads, or virtual cores, onto physical cores in a multicore NUMA system. Different placements result in varying degrees of contention for shared resources, so choosing the right placement can have a large ef ...

USENIX ASSOC2018

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Scratchpad memory

Multi-Ported GC-eDRAM Bitcell with Dynamic Port Configuration and Refresh Mechanism

Post-Moore's Law Fusion: High-Bandwidth Memory, Accelerators, and Native Half-Precision Processing for CPU-Local Analytics

Chaosity: Understanding Contemporary NUMA-architectures

WR2A: A Very-Wide-Register Reconfigurable-Array Architecture for Low-Power Embedded Devices

Decentralized in-order execution of a sequential task-based code for shared-memory architectures

Performance Estimation of High-Level Dataflow Program on Heterogeneous Platforms

A 24 kb Single-Well Mixed 3T Gain-Cell eDRAM with Body-Bias in 28 nm FD-SOI for Refresh-Free DSP Applications

Processing Megapixel Images with Deep Attention-Sampling Models

Placement of Virtual Containers on NUMA systems: A Practical and Comprehensive Model

Placement of Virtual Containers on NUMA systems: A Practical and Comprehensive Model

Graph Chatbot

Chattez avec Graph Search

Post-Moore's Law Fusion: High-Bandwidth Memory, Accelerators, and Native Half-Precision Processing for CPU-Local Analytics

WR2A: A Very-Wide-Register Reconfigurable-Array Architecture for Low-Power Embedded Devices

Chaosity: Understanding Contemporary NUMA-architectures

A 24 kb Single-Well Mixed 3T Gain-Cell eDRAM with Body-Bias in 28 nm FD-SOI for Refresh-Free DSP Applications

Processing Megapixel Images with Deep Attention-Sampling Models

Placement of Virtual Containers on NUMA systems: A Practical and Comprehensive Model

Performance Estimation of High-Level Dataflow Program on Heterogeneous Platforms

Multi-Ported GC-eDRAM Bitcell with Dynamic Port Configuration and Refresh Mechanism

Decentralized in-order execution of a sequential task-based code for shared-memory architectures

Placement of Virtual Containers on NUMA systems: A Practical and Comprehensive Model