Publications associées à Multiprocessing

Heterogeneous and Inexact: Maximizing Power Efficiency of Edge Computing Sensors for Health Monitoring Applications

David Atienza Alonso, Giovanni Ansaloni, Miguel Peon Quiros, Soumya Subhra Basu, Loris Gérard Duch

In the Internet-of-Things (IoT) era, there is an increasing trend to enable intelligent behavior in edge computing sensors. Thus, a new generation of smart wearable devices for health monitoring is being developed, able to perform complex Digital Signal Pr ...

IEEE2018

High-Precision Performance Estimation for the Design Space Exploration of Dynamic Dataflow Programs

Marco Mattavelli, Simone Casale Brunet, Endri Bezati, Malgorzata Maria Michalska

The implementation and optimization of dynamic dataflow programs on multi/many-core platforms require solving a very difficult problem: how to partition and schedule the processing elements and dimension their interconnecting buffers according to given opt ...

2018

193 MOPS/mW @ 162 MOPS, 0.32V to 1.15V voltage range multi-core accelerator for energy efficient parallel and sequential digital processing

Andreas Peter Burg, Adam Shmuel Teman, Luca Benini, Jeremy Hugues-Felix Constantin

Low power (mW) and high performance (GOPS) are strong requirements for compute-intensive signal processing in E-health, Internet-of-Things, and wearable applications. This work presents a building block for programmable Ultra-Low Power accelerators, namely ...

Ieee2016

Measuring air borne nanoparticles for characterizing hyphenated RDD-SMPS-ICPMS instrumentation

Christian Ludwig, Mohamed Tarik, Adrian Hess

Scanning Mobility Particle Sizer (SMPS) and Inductively Coupled Plasma Mass Spectrometry (ICPMS), complemented by a Rotating Disk Diluter (RDD) to a hyphenated RDD-SMPS-ICPMS measuring setup, allow online and simultaneous determination of size distribution ...

Elsevier2016

Virtual Ways: Low-Cost Coherence for Instruction Set Extensions with Architecturally Visible Storage

Edoardo Charbon, Paolo Ienne, Ties Jan Henderikus Kluter, Samuel Burri, Philip Brisk

Instruction set extensions (ISEs) improve the performance and energy consumption of application-specific processors. ISEs can use architecturally visible storage (AVS), localized compiler-controlled memories, to provide higher I/O bandwidth than reading da ...

Assoc Computing Machinery2014

Spatial Locality Speculation to Reduce Energy in Chip-Multiprocessor Networks-on-Chip

Boris Robert Grot

As processor chips become increasingly parallel, an efficient communication substrate is critical for meeting performance and energy targets. In this work, we target the root cause of network energy consumption through techniques that reduce link and route ...

Institute of Electrical and Electronics Engineers2014

Representation of Medical Guidelines with a Computer Interpretable Model

Giovanni De Micheli, Alena Simalatsar, Wenqi You Dubout

Nowadays medical software is tightly coupled with medical devices that perform patient state monitoring and lately even some basic treatment procedures. Medical guidelines (GLs) can be seen as specification of a medical system which requires their computer ...

World Scientific Publ Co Pte Ltd2014

Ultra-Low Power Multicore Architecture For Parallel Biomedical Signal Processing

David Atienza Alonso, Andreas Peter Burg, Jeremy Hugues-Felix Constantin, Ahmed Yasir Dogan

A multi-core architecture with ultra-low power consumption is needed for a wide variety of applications, especially in the bio-medical domain. In this patent, an ultra-low power multi-core architecture is presented: it is composed of one or more cores, sev ...

2014

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Multiprocessing

Heterogeneous and Inexact: Maximizing Power Efficiency of Edge Computing Sensors for Health Monitoring Applications

High-Precision Performance Estimation for the Design Space Exploration of Dynamic Dataflow Programs

Efficient Adaptive Hard Real-time Multi-processor Systems

193 MOPS/mW @ 162 MOPS, 0.32V to 1.15V voltage range multi-core accelerator for energy efficient parallel and sequential digital processing

Dynamic NoC buffer allocation for MPSoC timing side channel attack protection

Measuring air borne nanoparticles for characterizing hyphenated RDD-SMPS-ICPMS instrumentation

Virtual Ways: Low-Cost Coherence for Instruction Set Extensions with Architecturally Visible Storage

Spatial Locality Speculation to Reduce Energy in Chip-Multiprocessor Networks-on-Chip

Representation of Medical Guidelines with a Computer Interpretable Model

Ultra-Low Power Multicore Architecture For Parallel Biomedical Signal Processing

Graph Chatbot

Chattez avec Graph Search

Representation of Medical Guidelines with a Computer Interpretable Model

Heterogeneous and Inexact: Maximizing Power Efficiency of Edge Computing Sensors for Health Monitoring Applications

Spatial Locality Speculation to Reduce Energy in Chip-Multiprocessor Networks-on-Chip

Efficient Adaptive Hard Real-time Multi-processor Systems

Ultra-Low Power Multicore Architecture For Parallel Biomedical Signal Processing

193 MOPS/mW @ 162 MOPS, 0.32V to 1.15V voltage range multi-core accelerator for energy efficient parallel and sequential digital processing

Dynamic NoC buffer allocation for MPSoC timing side channel attack protection

Measuring air borne nanoparticles for characterizing hyphenated RDD-SMPS-ICPMS instrumentation

Virtual Ways: Low-Cost Coherence for Instruction Set Extensions with Architecturally Visible Storage

High-Precision Performance Estimation for the Design Space Exploration of Dynamic Dataflow Programs