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Concept
Nucleus RTOS
Résumé
Nucleus RTOS is a real-time operating system (RTOS) produced by the Embedded Software Division of Mentor Graphics, a Siemens Business, supporting 32- and 64-bit embedded system platforms. The operating system (OS) is designed for real-time embedded systems for medical, industrial, consumer, aerospace, and Internet of things (IoT) uses. Nucleus was released first in 1993. The latest version is 3.x, and includes features such as power management, process model, 64-bit support, safety certification, and support for heterogeneous computing multi-core system on a chip (SOCs) processors.
Nucleus process model adds space domain partitioning for task and module isolation on SOCs with either a memory management unit (MMU) or memory protection unit (MPU), such as those based on ARMv7/8 Cortex-A/R/M cores.
Nucleus supports many embedded processors including leading ARMv7 Cortex A, R, and M devices. Recent releases support ARMv8 64-bit devices. The official website has a full list of supported devices. It includes 32-bit MCUs and MPUs, configurable devices, and 32-bit and 64-bit multi-core processors.
Nucleus 1.x was released first in 1993 by Accelerated Technology (ATI) as Nucleus PLUS. It soon became one of the most commonly used RTOSs in the embedded market. Following its early success there, ATI added support for networking, graphics, and s, which accelerated adoption.
Mentor Graphics acquired ATI in March 2002, which was soon followed by the second generation of Nucleus RTOS. Version 2.x was released in 2003, improving its portability across different architectures and tool sets. New components like IPv6, Flash memory file system and Universal Serial Bus (USB) 2.0 were added. Mentor replaced the legacy Codelab debugger with EDGE development tools which included compiler tools, debugger, simulator, and profiler.
Mentor Graphics introduced the 3rd generation Nucleus in 2010. Version 3.x was intended for both high-end microprocessor units (MPUs), microcontroller units (MCUs), digital signal processors (DSPs), and field-programmable gate arrays (FPGAs).
Source officielle
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