Publications de Arnab Biswas | EPFL Graph Search

Tunnel fet based non-volatile memory boosted by vertical band-to-band tunneling

Mihai Adrian Ionescu, Saurabh Tomar, Arnab Biswas

A tunnel field effect transistor (TFET), including a source region, a gate region, a channel region, and a drain region, the gate region including a gate stack, wherein an area of the source region that is facing the channel region is overlapped by the gat ...

2018

A Steep-Slope Transistor Combining Phase-Change and Band-to-Band-Tunneling to Achieve a sub-Unity Body Factor

Mihai Adrian Ionescu, Anna Krammer, Teodor Rosca, Josef Andreas Schuler, Cem Alper, Wolfgang Amadeus Vitale, Arnab Biswas, Emanuele Andrea Casu, Qun Zhao

Steep-slope transistors allow to scale down the supply voltage and the energy per computed bit of information as compared to conventional field-effect transistors (FETs), due to their sub-60 mV/decade subthreshold swing at room temperature. Currently pursu ...

Nature Research2017

Benchmarking of Homojunction Strained-Si NW Tunnel FETs for Basic Analog Functions

Mihai Adrian Ionescu, Cem Alper, Arnab Biswas, Florin Udrea

This paper reports a compact ambipolar model for homojunction strained-silicon (sSi) nanowire (NW) tunnel FETs (TFETs) capable of accurately describing both I-V and G-V characteristics in all regimes of operation, n- and p-ambipolarity, the superlinear ons ...

Institute of Electrical and Electronics Engineers2017

Hybrid phase-change — Tunnel FET (PC-TFET) switch with subthreshold swing < 10mV/decade and sub-0.1 body factor: Digital and analog benchmarking

Mihai Adrian Ionescu, Anna Krammer, Teodor Rosca, Josef Andreas Schuler, Wolfgang Amadeus Vitale, Cem Alper, Arnab Biswas, Emanuele Andrea Casu, Nicolò Oliva

In this paper we report the first hybrid Phase-Change - Tunnel FET (PC-TFET) device configurations for achieving a deep sub-thermionic steep subthreshold swing at room temperature and subthreshold power savings. The proposed hybrid device feedbacks the ste ...

IEEE2016

Single field effect transistor capacitor-less memory device and method of operating the same

Mihai Adrian Ionescu, Arnab Biswas, Nilay Dagtekin

A single field effect transistor capacitor-less memory device, and method of operating the same, including a drain region, a source region, an intrinsic channel region between the drain region and the source region forming the single field effect transisto ...

Technology Transfer Office EPFL2016

Compact modeling of DG-Tunnel FET for Verilog-A implementation

Mihai Adrian Ionescu, Antonios Bazigos, Luca De Michielis, Arnab Biswas

In this work, a compact model based on an analytical closed form solution of the 1D Poisson's equation for a double-gate Tunnel FET is derived. Furthermore, the current levels are estimated by implementing an algorithm based on the Kane's band-to-band tunn ...

IEEE2015

Tunnel Field Effect Transistors : from Steep-Slope Electronic Switches to Energy Efficient Logic Applications

Arnab Biswas

The aim of this work has been the investigation of homo-junction Tunnel Field Effect Transistors starting from a compact modelling perspective to its possible applications. Firstly a TCAD based simulation study is done to explain the main device characteri ...

EPFL2015

A capacitance-voltage model for DG-TFET

Mihai Adrian Ionescu, Arnab Biswas

IEEE, Piscataway, NJ, USA2015

Conformal Mapping Based DC Current Model For Double Gate Tunnel FETs

Mihai Adrian Ionescu, Luca De Michielis, Cem Alper, Arnab Biswas

In this work, the conformal mapping technique is applied to obtain an analytical closed form solution of the 2D Poisson’s equation for a double-gate Tunnel FET. The generated band profiles are accurate in all regions of device operation. Furthermore, the c ...

IEEE2014

Investigation of Tunnel Field-Effect Transistors as a Capacitor-less Memory Cell

Mihai Adrian Ionescu, Wladyslaw Grabinski, Antonios Bazigos, Arnab Biswas, Nilay Dagtekin

In this work we report experimental results on the use of Tunnel Field-Effect Transistors (TFET) as capacitorless Dynamic Random Access Memory (DRAM) cells, implemented as a double-gate (DG) Fully-Depleted Silicon-On-Insulator (FD-SOI) devices. The devices ...

American Institute of Physics2014