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Arnab Biswas

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Publications associées (21)

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A tunnel field effect transistor (TFET), including a source region, a gate region, a channel region, and a drain region, the gate region including a gate stack, wherein an area of the source region that is facing the channel region is overlapped by the gat ...

2018

Benchmarking of Homojunction Strained-Si NW Tunnel FETs for Basic Analog Functions

Mihai Adrian Ionescu, Cem Alper, Arnab Biswas, Florin Udrea

This paper reports a compact ambipolar model for homojunction strained-silicon (sSi) nanowire (NW) tunnel FETs (TFETs) capable of accurately describing both I-V and G-V characteristics in all regimes of operation, n- and p-ambipolarity, the superlinear ons ...

Institute of Electrical and Electronics Engineers2017

A Steep-Slope Transistor Combining Phase-Change and Band-to-Band-Tunneling to Achieve a sub-Unity Body Factor

Mihai Adrian Ionescu, Anna Krammer, Teodor Rosca, Josef Andreas Schuler, Wolfgang Amadeus Vitale, Cem Alper, Arnab Biswas, Emanuele Andrea Casu, Qun Zhao

Steep-slope transistors allow to scale down the supply voltage and the energy per computed bit of information as compared to conventional field-effect transistors (FETs), due to their sub-60 mV/decade subthreshold swing at room temperature. Currently pursu ...

Nature Publishing Group2017

Single field effect transistor capacitor-less memory device and method of operating the same

Mihai Adrian Ionescu, Arnab Biswas, Nilay Dagtekin

A single field effect transistor capacitor-less memory device, and method of operating the same, including a drain region, a source region, an intrinsic channel region between the drain region and the source region forming the single field effect transisto ...

Technology Transfer Office EPFL2016

Vertical versus lateral tunneling FET non-volatile memory cell

Mihai Adrian Ionescu, Saurabh Tomar, Arnab Biswas

This work reports a comparison of high-k AbO(3)/HfO2/Al2O3 dielectric stack Tunnel FETs with both vertical tunneling and lateral tunneling, as non-volatile memory (NVM) cells. Tunnel FET NVM are fabricated and characterized to evaluate their potential as l ...

IEEE2016

Modeling and simulation of low power ferroelectric non-volatile memory tunnel field effect transistors using silicon-doped hafnium oxide as gate dielectric

Mihai Adrian Ionescu, Ali Saeidi, Arnab Biswas

The implementation and operation of the nonvolatile ferroelectric memory (NVM) tunnel field effect transistors with silicon-doped HfO2 is proposed and theoretically examined for the first time, showing that ferroelectric nonvolatile tunnel field effect tra ...

2016

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In this paper we report the first hybrid Phase-Change - Tunnel FET (PC-TFET) device configurations for achieving a deep sub-thermionic steep subthreshold swing at room temperature and subthreshold power savings. The proposed hybrid device feedbacks the ste ...

IEEE2016

The aim of this work has been the investigation of homo-junction Tunnel Field Effect Transistors starting from a compact modelling perspective to its possible applications. Firstly a TCAD based simulation study is done to explain the main device characteri ...

EPFL2015

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In this work, a compact model based on an analytical closed form solution of the 1D Poisson's equation for a double-gate Tunnel FET is derived. Furthermore, the current levels are estimated by implementing an algorithm based on the Kane's band-to-band tunn ...

IEEE2015

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In this work we report experimental results on the use of Tunnel Field-Effect Transistors (TFET) as capacitorless Dynamic Random Access Memory (DRAM) cells, implemented as a double-gate (DG) Fully-Depleted Silicon-On-Insulator (FD-SOI) devices. The devices ...

American Institute of Physics2014