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Cosimo Aprile

Publications associées (16)

A 16-Channel Wireless Neural Recording System-on-Chip with CHT Feature Extraction Processor in 65nm CMOS

Volkan Cevher, Stéphanie Lacour, Catherine Dehollain, Cosimo Aprile, Arda Uran, Alix Esther Anne Trouillet, Yusuf Leblebici, Kerim Türe, Florian Dylan Fallegger

Wireless implantable neural recording chips enable multichannel data acquisition with high spatiotemporal resolution in situ. Recently, the use of machine learning approaches on neural data for diagnosis and prosthesis control have renewed the interest in ...
2021

A 161-mW 56-Gb/s ADC-Based Discrete Multitone Wireline Receiver Data-Path in 14-nm FinFET

Andreas Peter Burg, Cosimo Aprile, Yusuf Leblebici, Alessandro Cevrero, Lukas Kull, Gain Kim, Ilter Ozkaya, Thomas Toifl

This article introduces a wireline receiver (RX) data-path employing discrete multi-tone (DMT) modulation for communicating over electrical links. The DMT RX incorporates a fully digital equalization data-path, with a synthesized and automatically placed a ...
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2020

A 24 kb Single-Well Mixed 3T Gain-Cell eDRAM with Body-Bias in 28 nm FD-SOI for Refresh-Free DSP Applications

Andreas Peter Burg, Robert Giterman, Cosimo Aprile, Yusuf Leblebici, Andrea Bonetti, Jonathan Emmanuel D Narinx, Nicolas Claude Frigerio

Logic-compatible gain-cell embedded DRAM (GC-eDRAM) is an emerging alternative to conventional SRAM for memory-dominated system-on-chip (SoC) designs due to its high-density, low-power, and two-ported operation. Although GCs have a limited data retention t ...
IEEE2019

A 4.8pJ/b 6Gb/s ADC-Based PAM-4 Wireline Receiver Data -Path with Cyclic Prefix in 14nm FinFET

Andreas Peter Burg, Cosimo Aprile, Yusuf Leblebici, Alessandro Cevrero, Lukas Kull, Gain Kim, Ilter Ozkaya, Thomas Toifl

This work presents an ADC-bascd receiver (RX) data-path for frame-based PAM-4 modulation with a cyclic prefix (CP). Similar to discrete multi-tone (DMT) modulation, a frame of PAM-4 symbols arc protected from the channel delay spread by the CP taps. A PAM- ...
IEEE2019

Learning-Based Hardware Design for Data Acquisition Systems

Cosimo Aprile

This multidisciplinary research work aims to investigate the optimized information extraction from signals or data volumes and to develop tailored hardware implementations that trade-off the complexity of data acquisition with that of data processing, conc ...
EPFL2018

An area and power efficient on-the-fly LBCS transformation for implantable neuronal signal acquisition systems

Volkan Cevher, Cosimo Aprile, Yusuf Leblebici, Luca Baldassarre

A power and area effcient hardware encoding system tailored for wireless implantable applications is presented. Constant medical monitoring allowed by implantable devices is the most relevant alternative to current bulky monitoring systems, which, in case ...
2018

Adaptive Learning-Based Compressive Sampling for Low-power Wireless Implants

Volkan Cevher, Catherine Dehollain, Mahsa Shoaran, Cosimo Aprile, Yusuf Leblebici, Luca Baldassarre, Kerim Türe, Gürkan Yilmaz, Franco Maloberti

Implantable systems are nowadays being used to interface the human brain with external devices, in order to understand and potentially treat neurological disorders. The most predominant design constraints are the system’s area and power. In this paper, we ...
2018

An area and power efficient on-the-fly LBCS transformation for implantable neuronal signal acquisition systems

Volkan Cevher, Cosimo Aprile, Yusuf Leblebici, Luca Baldassarre

A power and area efficient hardware encoding system tailored for wireless implantable applications is presented. Constant medical monitoring allowed by implantable devices is the most relevant alternative to current bulky monitoring systems, which, in case ...
ASSOC COMPUTING MACHINERY2018

An Eight lanes 7Gb/s/pin Source Synchronous Single-Ended RX with Equalization and Far-End Crosstalk Cancellation for Backplane Channels

Volkan Cevher, Cosimo Aprile, Yusuf Leblebici, Alessandro Cevrero, Lukas Kull, Thomas Toifl

This paper presents a versatile crosstalk cancellation scheme for single-ended multi-lane backplane links. System-level investigations show that a scheme, which combines analog filters and decision-feedback crosstalk compensation on the receiver (RX) side ...
2018

Parallel Implementation Technique of Digital Equalizer for Ultra-High-Speed Wireline Receiver

Cosimo Aprile, Yusuf Leblebici, Alessandro Cevrero, Lukas Kull, Gain Kim, Ilter Ozkaya, Thomas Toifl

This paper presents a parallel implementation technique of digital equalizer for high-speed wireline serial link receiver (RX). In wireline RX, inter-symbol interference (ISI) is mitigated by continuous-time linear equalizer, and the remaining ISI is cance ...
2018

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