Publications de Mustafa Kilic | EPFL Graph Search

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Mustafa Kilic

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High Speed SAR ADC Architectures in 28nm FDSOI CMOS

Generalization of Referenceless Timing Mismatch Calibration Methods for Time-Interleaved ADCs

A Row-Column Accessed Dynamic Element Matching DAC Architecture for SAR ADCs

A Row-Column Accessed Dynamic Element Matching DAC Architecture for SAR ADCs

Generalization of Referenceless Timing Mismatch Calibration Methods for Time-Interleaved ADCs

A Pipelined Speed Enhancement Technique for CDAC-Threshold Configuring SAR ADC

A DAC Assisted Speed Enhancement Technique for High Resolution SAR ADC

A Hybrid CDAC-Threshold Configuring SAR ADC in 28nm FDSOI CMOS

An Implantable High-Voltage Cortical Stimulator for Post-stroke Rehabilitation Enhancement with High-Current Driving Capacity

Power-Efficient CMOS Image Acquisition System based on Compressive Sampling

High Speed SAR ADC Architectures in 28nm FDSOI CMOS

Power-Efficient CMOS Image Acquisition System based on Compressive Sampling

A Row-Column Accessed Dynamic Element Matching DAC Architecture for SAR ADCs

Generalization of Referenceless Timing Mismatch Calibration Methods for Time-Interleaved ADCs

A DAC Assisted Speed Enhancement Technique for High Resolution SAR ADC

Generalization of Referenceless Timing Mismatch Calibration Methods for Time-Interleaved ADCs

A Row-Column Accessed Dynamic Element Matching DAC Architecture for SAR ADCs

A Pipelined Speed Enhancement Technique for CDAC-Threshold Configuring SAR ADC

A Hybrid CDAC-Threshold Configuring SAR ADC in 28nm FDSOI CMOS

An Implantable High-Voltage Cortical Stimulator for Post-stroke Rehabilitation Enhancement with High-Current Driving Capacity