Boris Robert Grot

Cette personne n’est plus à l’EPFL

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Publications associées (28)

Spatial Locality Speculation to Reduce Energy in Chip-Multiprocessor Networks-on-Chip

Boris Robert Grot

As processor chips become increasingly parallel, an efficient communication substrate is critical for meeting performance and energy targets. In this work, we target the root cause of network energy consumption through techniques that reduce link and route ...

Institute of Electrical and Electronics Engineers2014

Meet the Walkers: Accelerating Index Traversals for In-Memory Databases

Babak Falsafi, Boris Robert Grot, Yusuf Onur Koçberber, Javier Picorel Obando, Kevin Lim

The explosive growth in digital data and its growing role in real-time decision support motivate the design of high-performance database management systems (DBMSs). Meanwhile, slowdown in supply voltage scaling has stymied improvements in core performance ...

2013

SHIFT: Shared History Instruction Fetch for Lean-Core Server Processors

Babak Falsafi, Boris Robert Grot, Ilknur Cansu Kaynak

2013

CCNoC: Specializing On-Chip Interconnects for Energy Efficiency in Cache-Coherent Servers

Giovanni De Micheli, Babak Falsafi, Boris Robert Grot, Ciprian Seiculescu, Stavros Volos, Naser Khosro Pour

Manycore chips are emerging as the architecture of choice to provide power efficiency and improve performance, while riding Moore’s Law. In these architectures, on-chip interconnects play a pivotal role in ensuring power and performance scalability. As sup ...

2012

Optimizing Data-Center TCO with Scale-Out Processors

Babak Falsafi, Boris Robert Grot, Pejman Lotfi Kamran

Performance and total cost of ownership (TCO) are key optimization metrics in large-scale data centers. According to these metrics, data centers designed with conventional server processors are inefficient. Recently introduced processors based on low-power ...

Institute of Electrical and Electronics Engineers2012

NOC-Out: Microarchitecting a Scale-Out Processor

Babak Falsafi, Boris Robert Grot, Pejman Lotfi Kamran

Scale-out server workloads benefit from many-core processor organizations that enable high throughput thanks to abundant request-level parallelism. A key characteristic of these workloads is the large instruction footprint that exceeds the capacity of priv ...

2012

A Qos-Enabled On-Die Interconnect Fabric For Kilo-Node Chips

Boris Robert Grot

To meet rapidly growing performance demands and energy constraints, future chips will likely feature thousands of on-die resources. Existing network-on-chip solutions weren't designed for scalability and will be unable to meet future interconnect demands. ...

2012

Scale-Out Processors

Babak Falsafi, Michael Ferdman, Boris Robert Grot, Yusuf Onur Koçberber, Pejman Lotfi Kamran, Stavros Volos, Javier Picorel Obando, Al Mutaz Adileh, Dorde Jevdic

Scale-out datacenters mandate high per-server throughput to get the maximum benefit from the large TCO investment. Emerging applications (e.g., data serving and web search) that run in these datacenters operate on vast datasets that are not accommodated by ...

Ieee2012

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