Publications de Ahmet Caner Yüzügüler

Hierarchical Training of Deep Neural Networks Using Early Exiting

Pascal Frossard, Liza Carol Andrea Dunbar, Ahmet Caner Yüzügüler, Yamin Sepehri

Deep neural networks (DNNs) provide state-of-the-art accuracy for vision tasks, but they require significant resources for training. Thus, they are trained on cloud servers far from the edge devices that acquire the data. This issue increases communication ...

Ieee-Inst Electrical Electronics Engineers Inc2024

Hardware-Software Co-design for Improved Resource Utilization in DNN Accelerators

Ahmet Caner Yüzügüler

Deep neural networks (DNN) have become an essential tool to tackle challenging tasks in many fields of computer science. However, their high computational complexity limits their applicability. Specialized DNN accelerators have been developed to accommodat ...

EPFL2023

Scale-out Systolic Arrays

Pascal Frossard, Babak Falsafi, Ahmet Caner Yüzügüler

Multi-pod systolic arrays are emerging as the architecture of choice in DNN inference accelerators. Despite their potential, designing multi-pod systolic arrays to maximize effective throughput/Watt-i.e., throughput/Watt adjusted when accounting for array ...

ASSOC COMPUTING MACHINERY2023

U-Boost NAS: Utilization-Boosted Differentiable Neural Architecture Search

Pascal Frossard, Nikolaos Dimitriadis, Ahmet Caner Yüzügüler

Optimizing resource utilization in target platforms is key to achieving high performance during DNN inference. While optimizations have been proposed for inference latency, memory footprint, and energy consumption, prior hardware-aware neural architecture ...

SPRINGER INTERNATIONAL PUBLISHING AG2022

Equinox: Training (for Free) on a Custom Inference Accelerator

Babak Falsafi, Martin Jaggi, Ahmet Caner Yüzügüler, Louis Coulon, Mario Paulo Drumond Lages De Oliveira, Arash Pourhabibi Zarandi

DNN inference accelerators executing online services exhibit low average loads because of service demand variability, leading to poor resource utilization. Unfortunately, reclaiming idle inference cycles is difficult as other workloads can not execute on a ...

ACM2021

Analog Neural Networks with Deep-submicron Nonlinear Synapses

Pascal Frossard, Babak Falsafi, Ahmet Caner Yüzügüler, Mario Paulo Drumond Lages De Oliveira, Firat Çelik

Deep neural network (DNN) inference tasks are computationally expensive. Digital DNN accelerators offer better density and energy efficiency than general-purpose processors but still not sufficient to be deployable on resource-constrained settings.Analog c ...

2019

Towards Commoditizing Simulations of System Models Using Recurrent Neural Networks

Ahmet Caner Yüzügüler

System modeling and simulation plays a crucial role in the engineering of large and complex systems from various fields, such as industrial automation or power systems. In this paper, we propose a method that can be used to easily deploy high fidelity simu ...

IEEE2018

Single-FPGA 3D Ultrasound Beamformer

Jean-Philippe Thiran, Giovanni De Micheli, Federico Angiolini, Marcel Arditi, Aya Mohamed Naguib Ahmed Ibrahim, Ahmet Caner Yüzügüler

In medical diagnosis, ultrasound (US) imaging is one of the most common, safe, and powerful techniques. Volumetric (3D) US imaging, an emerging technique, is even more attractive than standard 2D imaging, as it allows for imaging without the local presence ...

Ieee2016

Demo: Efficient Delay and Apodization for on-FPGA 3D Ultrasound

Jean-Philippe Thiran, Giovanni De Micheli, Federico Angiolini, Marcel Arditi, Aya Mohamed Naguib Ahmed Ibrahim, Ahmet Caner Yüzügüler

In medical diagnosis, ultrasound (US) imaging is one of the most common, safe, and powerful techniques. Volumetric (3D) US is potentially very attractive, compared to 2D US, because it might enable telesonography - decoupling the local image acquisition, b ...

2016

Single-FPGA, Scalable, Low-Power, and High-Quality 3D Ultrasound Beamformer

Jean-Philippe Thiran, Giovanni De Micheli, Federico Angiolini, Marcel Arditi, Aya Mohamed Naguib Ahmed Ibrahim, Ahmet Caner Yüzügüler

We present an efficient FPGA architecture suitable for a medical 3D ultrasound beamformer. We tackle the delay calculation bottleneck, which is the heart and the most critical part of the beam-former, by proposing a computationally efficient design that is ...

Ieee2016