Publications de Heinz Riener | EPFL Graph Search

Customizable On-the-fly Design Space Exploration for Logic Optimization of Emerging Technologies

Giovanni De Micheli, Heinz Riener, Siang-Yun Lee

2023

Boolean Rewriting Strikes Back: Reconvergence- Driven Windowing meets Resynthesis

Giovanni De Micheli, Heinz Riener, Siang-Yun Lee

The paper presents a novel DAG-aware Boolean rewriting algorithm for restructuring combinational logic before technology mapping. The algorithm, called window rewriting, repeatedly selects small parts of the logic and replaces them with more compact implem ...

IEEE2022

A Versatile Mapping Approach for Technology Mapping and Graph Optimization

Giovanni De Micheli, Heinz Riener, Alessandro Tempia Calvino, Shubham Rai, Akash Kumar

This paper proposes a versatile mapping approach that has three objectives: i) it can map from one technology-independent graph representation to another; ii) it can map to a cell library; iii) it supports logic rewriting. The method is cut-based, mitigate ...

IEEE2022

External Don’t Cares in Logic Synthesis

Giovanni De Micheli, Heinz Riener, Siang-Yun Lee

2022

A Simulation-Guided Paradigm for Logic Synthesis and Verification

Giovanni De Micheli, Heinz Riener, Siang-Yun Lee

This article proposes a new logic synthesis and verification paradigm based on circuit simulation. In this paradigm, high quality, expressive simulation patterns are pregenerated to be reused in multiple runs of optimization and verification algorithms, re ...

2022

Utilizing XMG-based Synthesis to Preserve Self-Duality for RFET-Based Circuits

Giovanni De Micheli, Heinz Riener, Alessandro Tempia Calvino, Shubham Rai, Akash Kumar

Individual transistors based on emerging reconfigurable nanotechnologies exhibit electrical conduction for both types of charge carriers. These transistors (referred to as Reconfigurable Field-Effect Transistors (RFETs)) enable dynamic reconfiguration to d ...

2022

An Automated Testing and Debugging Toolkit for Gate-Level Logic Synthesis Applications

Giovanni De Micheli, Heinz Riener, Siang-Yun Lee

2022

Beyond Local Optimality of Buffer and Splitter Insertion for AQFP Circuits

Giovanni De Micheli, Heinz Riener, Siang-Yun Lee

Adiabatic quantum-flux parametron (AQFP) is an energy-efficient superconducting technology. Buffer and splitter (B/S) cells must be inserted to an AQFP circuit to meet the technology-imposed constraints on path balancing and fanout branching. These cells a ...

ACM2022

Preserving Self-Duality During Logic Synthesis for Emerging Reconfigurable Nanotechnologies

Giovanni De Micheli, Heinz Riener, Shubham Rai, Akash Kumar

Emerging reconfigurable nanotechnologies allow the implementation of self-dual functions with a fewer number of transistors as compared to traditional CMOS technologies. To achieve better area results for Reconfigurable Field-Effect Transistors (RFET)-base ...

IEEE2021

From Boolean functions to quantum circuits: A scalable quantum compilation flow in C++

Giovanni De Micheli, Fereshte Mozafari Ghoraba, Heinz Riener, Giulia Meuli, Bruno Schmitt Antunes

We propose a flow for automated quantum compila- tion. Our flow takes a Boolean function implemented in Python as input and translates it into a format appropriate for reversible logic synthesis. We focus on two quantum compilation tasks: uniform state pre ...

2021