Publication
Fast Prototyping and Refinement of Complex Dynamic Data Types in Multimedia Applications for Consumer Devices
Publications associées (32)
Multi-Ported GC-eDRAM Bitcell with Dynamic Port Configuration and Refresh Mechanism
Adam Shmuel Teman, Robert Giterman
Embedded memories occupy an increasingly dominant part of the area and power budgets of modern systems-on-chips (SoCs). Multi-ported embedded memories, commonly used by media SoCs and graphical processing units, occupy even more area and consume higher pow ...
MDPI2024Rebooting Virtual Memory with Midgard
Virtual Memory (VM) is a critical programming abstraction that is widely used in various modern computing platforms. With the rise of datacenter computing and birth of planet-scale online services, the semantic and capacity requirements from memory have ev ...
EPFL2023In-Memory Hardware and Architectural Extensions for Workloads Acceleration
Utilization of edge devices has exploded in the last decade, with such use cases as wearable devices, autonomous driving, and smart homes. As their ubiquity grows, so do expectations of their capabilities. Simultaneously, their formfactor and use cases lim ...
EPFL2022Miss-Optimized Memory Systems: Turning Thousands of Outstanding Misses into Reuse Opportunities
Even if Dennard scaling came to an end fifteen years ago, Moore's law kept fueling an exponential growth in compute performance through increased parallelization. However, the performance of memory and, in particular, Dynamic Random Access Memory (DRAM), ...
EPFL2021DynaBurst: Dynamically Assemblying DRAM Bursts over a Multitude of Random Accesses
The effective bandwidth of the FPGA external memory, usually DRAM, is extremely sensitive to the access pattern. Nonblocking caches that handle thousands of outstanding misses (miss-optimized memory systems) can dynamically improve bandwidth utilization wh ...
IEEE2019Optimized Memory Access For Dynamically Scheduled High Level Synthesis
Paolo Ienne, Atri Bhattacharyya
Dynamically-scheduled elastic circuits generated by High-Level Synthesis (HLS) tools are inherently out-of-order, following the flow of data rather than the evolution of an instruction pointer. Components of the circuit which access memory need to be conne ...
2018Near-Memory Address Translation
Virtual memory (VM) is a crucial abstraction in modern computer systems at any scale, from handheld devices to datacenters. VM provides programmers the illusion of an always sufficiently large and linear memory, making programming easier. Although the core ...
EPFL2017Microarchitectural Low-Power Design Techniques for Embedded Microprocessors
Jeremy Hugues-Felix Constantin
With the omnipresence of embedded processing in all forms of electronics today, there is a strong trend towards wireless, battery-powered, portable embedded systems which have to operate under stringent energy constraints. Consequently, low power consumpti ...
EPFL2016Asynchronous memory access chaining
Babak Falsafi, Boris Robert Grot, Yusuf Onur Koçberber
In-memory databases rely on pointer-intensive data structures to quickly locate data in memory. A single lookup operation in such data structures often exhibits long-latency memory stalls due to dependent pointer dereferences. Hiding the memory latency by ...
2015Accelerators for Data Processing
The explosive growth in digital data and its growing role in real-time analytics motivate the design of high-performance database management systems (DBMSs). Meanwhile, slowdown in supply voltage scaling has stymied improvements in core performance and ush ...
EPFL2015