Characterization of effective mobility by split C(V) technique in N-MOSFETs with ultra-thin gate oxides
Publications associées (42)
Graph Chatbot
Chattez avec Graph Search
Posez n’importe quelle question sur les cours, conférences, exercices, recherches, actualités, etc. de l’EPFL ou essayez les exemples de questions ci-dessous.
AVERTISSEMENT : Le chatbot Graph n'est pas programmé pour fournir des réponses explicites ou catégoriques à vos questions. Il transforme plutôt vos questions en demandes API qui sont distribuées aux différents services informatiques officiellement administrés par l'EPFL. Son but est uniquement de collecter et de recommander des références pertinentes à des contenus que vous pouvez explorer pour vous aider à répondre à vos questions.
During the past decade, graphene --- a monolayer of carbon atoms --- has attracted enormous interest for its use in nanoelectronic device applications. The absence of bandgap, however, has stalled its use both in logic (inability to turn off) and radio fre ...
This thesis explores the electronic properties of one layered transition-metal dichalcogenide – single-layer MoS2, and demonstrates the first transistors and integrated circuits with characteristics that outperform graphene electronics in many aspects and ...
A 3D vertically stacked silicon nanowire (SiNW) field effect transistor featuring a high density array of fully depleted channels gated by a backgate and one or two symmetrical platinum side-gates through a liquid has been electrically characterized for th ...
Resonators for time and frequency reference applications are essential elements found in most electronic devices surrounding us. The continuous minimization and ubiquitous distribution of such electronic devices and circuits demands for resonators of small ...
Over the recent decades, the balance between increasing the complexity of computer chips and simultaneously reducing cost per bit has been accommodated by down-scaling. While extremely successful in the past, this approach now faces grave limitations leadi ...
Performance improvement by device scaling has been the prevailing method in the semiconductor industry over the past four decades. However, current silicon transistor technology is approaching a fundamental limit where scaling does not improve device perfo ...
We realized ambipolar field-effect transistors by coupling exfoliated thin flakes of tungsten disulfide (WS2) with an ionic liquid dielectric. The devices show ideal electrical characteristics, including very steep subthreshold slopes for both electrons an ...
Multi-gate devices e.g. gate-all-around (GAA) Si nanowires and FinFETs are promising can- didates for aggressive CMOS downscaling. Optimum subthreshold slope, immunity against short channel effect and optimized power consumption are the major benefits of s ...
In this paper, we report the first systematic study on electron mobility extraction in equilateral triangular gate-all-around Si nanowire junctionless nMOSFETs with cross-section down to 5 nm. 1 x 10(19) cm(-3) n-type channel doping, 5-20 nm Si nanowire wi ...
Described is an electrochromic nanocomposite film comprising a solid matrix of an oxide based material, the solid matrix comprising a plurality of transparent conducting oxide (TCO) nanostructures dispersed in the solid matrix and a lithium salt dispersed ...