Current-Mode Analog Adaptive Mechanism for Ultralow-Power Neural Networks

Rafal Tomasz Dlugosz
Institute of Electrical and Electronics Engineers, 2011
Article

Neural networks (NNs) implemented at the transistor level are powerful adaptive systems. They can perform hundreds of operations in parallel but at the expense of a large number of building blocks. In the case of analog realization, an extremely low chip area and low power dissipation can be achieved. To accomplish this, the building blocks should be simple. This brief presents a new current-mode low-complexity flexible adaptive mechanism (ADM) with a strongly reduced leakage in analog memory. Input signals ranging from 0.5 to 20 μA are held for 10–50 ms, with the leakage rate from 0.2%/ms to 0.04%/ms, respectively, depending on temperature. A small storage capacitor of 200 fF enables a short write time (< 100 ns). A single ADMcell occupies 1400 μm2 when realized in the Taiwan Semiconductor Manufacturing Company Ltd. CMOS 0.18-μm technology. The potential application of this NN is envisioned in a mobile platform based on a wireless sensor network to be used for online analysis of electrocardiography signals.

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Rafal Tomasz Dlugosz
Institute of Electrical and Electronics Engineers, 2011
Article

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https://infoscience.epfl.ch/record/163763?ln=fr

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In this paper, we present a block of adaptive weight change (AWC) mechanism for analog current-mode Kohonen's Neural Network (KNN) implemented in CMOS 0.18 μm technology. As some other essential building blocks of KNNs dealing with the calculations of the Euclidean distance, formation of a conscience mechanism and a determination of the winner-takes-all (WTA) circuits have been already developed, the AWC forms another essential step towards the realization of the network. We show that the proposed network works with small values of analog signals thus resulting in low power dissipation and chip area when compared with digital realizations of KNNs. Each neuron occupies chip area equal to about 1000 μm2 and dissipates 20 μW of power for 20 MHz input data rate.

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