SiN membranes with submicrometer hole arrays patterned by wafer-scale nanosphere lithography

In this work, nanosphere lithography was integrated with standard microfabrication for the wafer-scale fabrication of silicon nitride (SiN) membranes with arrays of submicrometer holes. A monolayer of polystyrene (PS) beads with a mean diameter of 428 or 535 nm was spin coated onto the front side of a (100)-silicon wafer double-side coated with 100 nm of low-stress SiN. The size of the deposited PS beads was reduced by oxygen plasma reactive ion etching. This allowed to tune the hole size in the released SiN membrane while maintaining the hole array periodicity. Using the size-reduced PS beads as a lift-off template in a standard nanosphere lithography lift-off procedure, a 20 nm thick chromium hole etch mask was realized. This hole mask was patterned by UV photolithography, thus allowing for the local dry-etching of holes into the SiN layer. The holey areas were released from the backside in a combined Si dry- and wet-etch process. During the final wet etch, the wafer front side was protected with a KOH-resistant polymeric coating (ProTEK®). In this way, holey SiN membranes with side lengths ranging from 400 um up to 2.4 mm were fabricated. Preliminary application specific experiments show the membranes’ suitability for microfiltration and stencil applications.

Nicolas Blondiaux, Jürgen Brugger, Harry Heinzelmann, Mona Julia Katharina Klein, Franck Montagne, Raphaël Pugin, Andreea Veronica Savu, Oscar Vazquez Mena

In this work, nanosphere lithography was integrated with standard microfabrication for the wafer-scale fabrication of silicon nitride (SiN) membranes with arrays of submicrometer holes. A monolayer of polystyrene (PS) beads with a mean diameter of 428 or 535 nm was spin coated onto the front side of a (100)-silicon wafer double-side coated with 100 nm of low-stress SiN. The size of the deposited PS beads was reduced by oxygen plasma reactive ion etching. This allowed to tune the hole size in the released SiN membrane while maintaining the hole array periodicity. Using the size-reduced PS beads as a lift-off template in a standard nanosphere lithography lift-off procedure, a 20 nm thick chromium hole etch mask was realized. This hole mask was patterned by UV photolithography, thus allowing for the local dry-etching of holes into the SiN layer. The holey areas were released from the backside in a combined Si dry-and wet-etch process. During the final wet etch, the wafer front side was protected with a KOH-resistant polymeric coating (ProTEK (R)). In this way, holey SiN membranes with side lengths ranging from 400 mu m up to 2.4 mm were fabricated. Preliminary application specific experiments show the membranes' suitability for microfiltration and stencil applications. (C) 2011 American Vacuum Society. [DOI: 10.1116/1.3554404]

2011

Wafer-Scale Fabrication of Thin SiN Membranes and Au Films and Membranes with Arrays of Sub-um Holes Using Nanosphere Lithography

Mona Julia Katharina Klein

In this thesis, the wafer-scale fabrication of SiN membranes, Au films and Au membranes with arrays of sub-µm holes is described. Two conceptually different processes (1) and (2) were developed, both of which are based on nanosphere lithography (NSL) with self-assembled close-packed monolayers of polystyrene (PS) beads. PS beads with a diameter D in the range of 420 nm to 530 nm were used. The hole array periodicity p was thus determined by D. Different bead deposition methods were tested; by spin-coating, a monolayer wafer coverage > 90% could be obtained. By O2-RIE, D could be reduced in a controlled way down to 0.3D. In process (1), holes were etched into the device layer using a hole etch mask made by NSL. The hole size ⌀ was determined by the reduced D. In this way, 100 nm thick SiN membranes with a maximum size of 2400×2400 µm2 and a hole density on the order of 108 holes/cm2 were fabricated by etching holes into the SiN. The membrane release was done in a combined dry-/wet-etch procedure. Similarly, hole arrays were fabricated on 2" glass wafers by sputter-etching into 200 nm thick Au films. With this process, different ⌀, e.g. from 60 nm to 180 nm, could be obtained for initially identical mask holes by tuning the sputter-etch parameters. In process (2), NSL was used to realize high aspect ratio Si and oxidized Si pillars that were subsequently used as a lift-off template. Free-standing, 200 nm thick, 1200◊1200 µm2 large Au membranes with ⌀ from 100 nm to 300 nm were successfully fabricated using Si pillars as KOH lift-off template and a Si-DRIE release procedure. Using oxidized Si pillars for lift-off in HF instead, such hole arrays in Au films could be transferred to flexible, transparent parylene films. The fabricated devices were characterized and successfully tested for stencil and refractive index sensing applications: Holey SiN membranes were bulge-tested and withstood pressures up to 5 bar, showing their suitability for stencil and filtration applications. Stenciling was successfully done for (a) the deposition of arrays of 230 nm in diameter Au and Ag dots onto Si substrates and (b) the etching of holes into a 500 nm thick SiN membrane. The light transmission characteristics of wafer-scale hole arrays in Au films were reproducible for different measurement locations. Similar hole arrays were used to detect refractive index changes in water of varying glycerine concentrations. The transmission through Cr/Au membranes with sub-wavelength hole arrays was measured. Upon Cr removal, the transmission was enhanced by a factor 2.4.

EPFL2010

Characterisation and applications of stencil lithography

Jürgen Brugger, Nao Takano, Marc Antonius Friedrich van den Boogaart, Oscar Vazquez Mena

Increased flexibility of patterning methods is important for the engineering of multimaterial and multifunctional nano/micro-electro-mechanical systems (NEMS/MEMS), such as polymer-based electronic and sensor devices, 3D microfluidic systems, and bio-analytical systems. Stencil lithography is a good candidate as it is a resistless, single step patterning method based on direct, local deposition of material on an arbitrary surface through a solid-state membrane, e.g. a 200-nm thick silicon nitride (SiN) membrane. We present two new stencil membrane stabilisation geometries and associated MEMS processes that allow for advancing further towards a well-controlled full-wafer (100 mm) nanostencil process for reproducible, high-throughput, large-area nanopatterning of mesoscopic structures (10-9 - 10-3 m). In fact, the major challenges for well-controlled and reproducible nanostencil lithography are to control stress-induced membrane deformation, clogging of membrane apertures and the gap between stencil and substrate. The stabilized membranes show improved membrane stability (i.e. reduced out-of-plane deformation) up to 94%, resulting in an improved pattern definition of stencil-deposited structures. We have also systematically characterized the clogging of membrane apertures and the influence of the gap between stencil and substrate on the deposited structures as a function of aperture size and deposited material. A method is presented to recover nominal dimensions of stencil-deposited structures over a gap. To integrate nanomechanical structures with CMOS circuits, stencil lithography was used as a clean, CMOS-compatible method to define the mechanical structures on a CMOS circuit, using the stencildeposited metal patterns as a mask for silicon reactive ion etching (RIE). When the stencil and the CMOS wafer are put in contact, a gap exists between the layer to be structured and the stencil. We have been able to correct the blurring effect by developing a controlled dry Al etch process. The results obtained provide a clear remedy to overcome one of the major challenges in nanostencil-based surface patterning. Stencil lithography is also used in the development of novel nanotemplates of anodic porous alumina (APA). To obtain APA structures with high regularity, a method to pre-pattern the surface of the aluminum substrate before conventional anodization is a prerequisite. A pre-patterned arrangement of dots or holes on Al plates is obtained by evaporation, sputtering, electrodeposition, or chemical etching through stencils. It should result in a high regularity mono-domain APA with pore spacing comparable with the visible wavelength for large area photonic crystals for optical applications and luminescence devices.