Publications associées à Methodology and Technique to Improve Throughput of FPGA-based CAL Dataflow Programs: Case Study of the RVC MPEG-4 SP Intra Decoder

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An FPGA-based processing pipeline for high definition stereo video

Andreas Peter Burg

This paper presents a real-time processing platform for high definition stereo video. The system is capable to process stereo-video streams at resolutions up to 1920x1080 at 30 frames per second (1080p30). In the hybrid FPGA-GPU-CPU system, a high-density ...

Hindawi Publishing Corporation2011

A comprehensive workflow for general-purpose neural modeling with highly configurable neuromorphic hardware systems

Eilif Benjamin Muller, Alain Destexhe, Marc-Olivier Schwartz

In this article, we present a methodological framework that meets novel requirements emerging from upcoming types of accelerated and highly configurable neuromorphic hardware systems. We describe in detail a device with 45 million programmable and dynamic ...

2011

Bio-Inspired Self-Testing and Self-Organizing Processing Arrays

Joël Rossier

Inspired by the basic processes of molecular biology, our previous studies resulted in defining a configurable molecule implementing self-replication and self-repair mechanisms made up of simple processes. The goal of our paper is to add error detection fe ...

Ieee Service Center, 445 Hoes Lane, Po Box 1331, Piscataway, Nj 08855-1331 Usa2010

Overview of the MPEG Reconfigurable Video Coding Framework

Marco Mattavelli, Christophe Lucarz

Video coding technology in the last 20 years has evolved producing a variety of diff erent and complex algorithms and coding standards. So far the speciﬁcation of such standards, and of the algorithms that build them, has been done case by case providing m ...

2009

Bio-Inspired Self-Testing and Self-Organizing Bit Slice Processors

Joël Rossier

Inspired by the basic processes of molecular biology, our previous studies resulted in defining self-testing and self-organizing mechanisms made up of simple processes. The goal of our paper is to introduce a configurable molecule able to implement these b ...

Ieee Service Center, 445 Hoes Lane, Po Box 1331, Piscataway, Nj 08855-1331 Usa2009

Dataflow/Actor-Oriented language for the design of complex signal processing systems

Marco Mattavelli, Christophe Lucarz, Ghislain Roquier

Signal processing algorithms become more and more complex and the algorithm architecture adaptation and design processes cannot any longer rely only on the intuition of the designers to build efficient systems. Specific tools and methods are needed to cope ...

2008

Bio-inspired Systems with Self-developing Mechanisms

Daniel Mange, Joël Rossier, Fabien Vannel

Bio-inspired systems borrow three structural principles characteristic of living organisms: multicellular architecture, cellular division, and cellular differentiation. Implemented in silicon according to these principles, our cellular systems are endowed ...

Springer2007

Methodology and Technique to Improve Throughput of FPGA-based CAL Dataflow Programs: Case Study of the RVC MPEG-4 SP Intra Decoder

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An FPGA-based processing pipeline for high definition stereo video

A comprehensive workflow for general-purpose neural modeling with highly configurable neuromorphic hardware systems

Bio-Inspired Self-Testing and Self-Organizing Processing Arrays

Overview of the MPEG Reconfigurable Video Coding Framework

Bio-Inspired Self-Testing and Self-Organizing Bit Slice Processors

Dataflow/Actor-Oriented language for the design of complex signal processing systems

How to Make Stream Processing More Mainstream

Bio-inspired Systems with Self-developing Mechanisms

Bio-inspired Systems with Self-developing Mechanisms

Dataflow/Actor-Oriented language for the design of complex signal processing systems

Bio-Inspired Self-Testing and Self-Organizing Processing Arrays

Bio-Inspired Self-Testing and Self-Organizing Bit Slice Processors

How to Make Stream Processing More Mainstream

A comprehensive workflow for general-purpose neural modeling with highly configurable neuromorphic hardware systems

An FPGA-based processing pipeline for high definition stereo video

Overview of the MPEG Reconfigurable Video Coding Framework