Compact Signatures for High-speed Interest Point Description and Matching
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There are many inventions described and illustrated herein. In a first aspect, the present invention is directed to a memory device and technique of reading data from and writing data into memory cells of the memory device. In this regard, in one embodimen ...
A surface potential-based model for embedded flash memory cells has been developed with the purpose of providing a comprehensive physical understanding of the device operation suitable for performance optimization in memory circuit design. The device equat ...
New memory technologies, such as phase-change memory (PCM), promise denser and cheaper main memory, and are expected to displace DRAM. However, many of them experience permanent failures far more quickly than DRAM. DRAM mechanisms that handle permanent fai ...
Collective computation is typically polynomial in the number of computational elements, such as transistors or neurons, whether one considers the storage capacity of a memory device or the number of floating-point operations per second of a CPU. However, w ...
The impact of 3D device architecture in aggressively scaled embedded non-volatile memories has been investigated by means of experiments and 3D TCAD simulations. A complete 3D calibration methodology covering DC and transient operating regimes has been int ...
This work describes the development of inkjet printed, low-cost memory cards, and complementary pair of memory card reader and card reader/programmer for PCs. This constitutes a complete system that can be used for various applications. The memory cards ar ...
The floating gate (FG) potential VFG in a non–volatile flash memory (NVM) device is the main parameter controlling the behavior of the cell. A common technique to model VFG is based on the calculation of the coupling coefficients between all the terminals ...
A polymer based Ferroelectric gate FET at 1T non-volatile memory on bulk silicon is demonstrated. Spin-coated 40 nm and 100 nm P(VDF-TrFE) (70%-30%) ultra-thin films have been integrated onto 10 nm SiO₂ layer as gate dielectric into a conventional silicon ...
The present work analyzes the impact of ferroelectric materials like PZT when integrated in a standard 0.5µm CMOS process in order to realize nonvolatile memories. The project has been initiated conjointly by the Swiss Federal Institute of Technology of La ...
A non-volatile random access memory (NVRAM) of the type with magnetoresistive memory elements (1) connected by sets of non-intersecting conductor sense lines (3, 4) which define the address of each memory element (1) and are connectable to a magnetic write ...