Publication

Power-Efficient Pipelined Analog-to-Digital Converter Architectures for Advanced CMOS Technologies

Publications associées (62)

À propos
Confidentialité
Mentions légales

Graph Chatbot

Chattez avec Graph Search

Posez n’importe quelle question sur les cours, conférences, exercices, recherches, actualités, etc. de l’EPFL ou essayez les exemples de questions ci-dessous.

AVERTISSEMENT : Le chatbot Graph n'est pas programmé pour fournir des réponses explicites ou catégoriques à vos questions. Il transforme plutôt vos questions en demandes API qui sont distribuées aux différents services informatiques officiellement administrés par l'EPFL. Son but est uniquement de collecter et de recommander des références pertinentes à des contenus que vous pouvez explorer pour vous aider à répondre à vos questions.

Connectez-vous pour utiliser Chat avec Graph Search

Power-Efficient Pipelined Analog-to-Digital Converter Architectures for Advanced CMOS Technologies

Graph Chatbot

Chattez avec Graph Search

Insulation Coordination for a Modular Multilevel Converter Prototype

Design of an integrated thermoelectric generator power converter for ultra-low power and low voltage body energy harvesters aimed at ExG active electrodes

Design of an integrated thermoelectric generator power converter for ultra-low power and low voltage body energy harvesters aimed at ExG active electrodes

Design and Implementation of A Rail-to-Rail 460-kS/s 10-bit SAR ADC for the Power-Efficient Capacitance Measurement

A Low Power On-Chip Class-E Power Amplifier For Remotely Powered Implantable Sensor Systems

Exploiting Dynamic Timing Margins in Microprocessors for Frequency-Over-Scaling with Instruction-Based Clock Adjustment

A 15 mu W 5.5 kS/s Resistive Sensor Readout Circuit with 7.6 ENOB

T0003 / MilliNewton & CentoNewton force sensors / Deviation from ratiometric behaviour

A 3.1 mW 8b 1.2 GS/s Single-Channel Asynchronous SAR ADC With Alternate Comparators for Enhanced Speed in 32 nm Digital SOI CMOS

A 35mW 8 b 8.8 GS/s SAR ADC with Low-Power Capacitive Reference Buffers in 32nm Digital SOI CMOS

Design of an integrated thermoelectric generator power converter for ultra-low power and low voltage body energy harvesters aimed at ExG active electrodes

Design and Implementation of A Rail-to-Rail 460-kS/s 10-bit SAR ADC for the Power-Efficient Capacitance Measurement

Design of an integrated thermoelectric generator power converter for ultra-low power and low voltage body energy harvesters aimed at ExG active electrodes

Insulation Coordination for a Modular Multilevel Converter Prototype

A 15 mu W 5.5 kS/s Resistive Sensor Readout Circuit with 7.6 ENOB

Exploiting Dynamic Timing Margins in Microprocessors for Frequency-Over-Scaling with Instruction-Based Clock Adjustment

T0003 / MilliNewton & CentoNewton force sensors / Deviation from ratiometric behaviour

A Low Power On-Chip Class-E Power Amplifier For Remotely Powered Implantable Sensor Systems

A 3.1 mW 8b 1.2 GS/s Single-Channel Asynchronous SAR ADC With Alternate Comparators for Enhanced Speed in 32 nm Digital SOI CMOS

A 35mW 8 b 8.8 GS/s SAR ADC with Low-Power Capacitive Reference Buffers in 32nm Digital SOI CMOS