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Addressable MEMS slit mask for multi-object spectroscopy based on multi-wafer stacking

Publications associées (32)

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A new versatile hybrid MEMS technology for high sensitivity, fluid proof sensing applications.

Matthias Neuenschwander

The field of micro electromechanical systems (MEMS) evolved from the microelectronic industry and the technologies developed to fabricate integrated circuits. As a result, MEMS are commonly fabricated on silicon wafers. The development of MEMS has been dri ...

EPFL2022

A through-glass via (TGV) provides a vertical electrical connection through a glass substrate. TGVs are used in advanced packaging solutions, such as glass interposers and wafer-level packaging of microelectromechanical systems (MEMS). However, TGVs are ch ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2018

Through Silicon Vias With Invar Metal Conductor for High-Temperature Applications

Mikhail Asiatici, Göran Stemme

Through silicon vias (TSVs) are key enablers of 3-D integration technologies which, by vertically stacking and interconnecting multiple chips, achieve higher performances, lower power, and a smaller footprint. Copper is the most commonly used conductor to ...

Institute of Electrical and Electronics Engineers2017

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High-speed signaling over package substrates is key to delivering the promise of 2.5D integration. Applications abound and include high-density memory interfaces, sub-division of large dies to increase yield and lower development time, sub-division of a di ...

2016

A Chip-Level Post-CMOS Via-Last Cu TSV Process for Multi-Layer Homogeneous 3D Integration

Seniz Esra Küçük, Yusuf Leblebici, Woo Yeong Cho

In this paper, a die-level CMOS post-processing scheme for 3D integration using the via-last approach is presented for multi-layer stacking. The process includes TSV fabrication, chip-to-chip bonding, and finally the TSV filling with Cu electroplating. The ...

Ieee2016

Digital information is communicated between stacked integrated circuit devices by inductive coupling between arrays of inductors formed from integrated circuit wiring layers. This can be done using a combination of push-pull drivers, common inductor return ...

2015

Cost-Effective Design of Mesh-of-Tree Interconnect for Multi-Core Clusters with 3-D Stacked L2 Scratchpad Memory

Giovanni De Micheli, Luca Benini

3-D integrated circuits (3-D ICs) offer a promising solution to overcome the scaling limitations of 2-D ICs. However, using too many through-silicon-vias (TSVs) pose a negative impact on 3-D ICs due to the large overhead of TSV (e.g., large footprint and l ...

Institute of Electrical and Electronics Engineers2015

3D-ICE: a Compact Thermal Model for Early-Stage Design of Liquid-Cooled ICs

David Atienza Alonso, Arvind Raj Mahankali Sridhar, Alessandro Vincenzi

Liquid-cooling using microchannel heat sinks etched on silicon dies is seen as a promising solution to the rising heat fluxes in two-dimensional and stacked three-dimensional integrated circuits. Development of such devices requires accurate and fast therm ...

Institute of Electrical and Electronics Engineers2014

Using a density-functional scheme, we study the migration of a single O atom in a (110) plane between two adjacent bond-center sites in bulk Si. The minimum energy migration path is found through the nudged elastic band method within a generalized gradient ...

American Physical Society2014

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A System-in-Package (SiP) concept for the 3D-integration of a Single Wall Carbon Nanotube (SWCNT) resonator with its CMOS driving electronics is presented. The key element of this advanced SiP is the monolithic 3D-integration of the MEMS with the CMOS elec ...

SPIE - International Society of Optical Engineering2013