Convex combination initialization method for kohonen neural network implemented in the CMOS technology
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A new optimized algorithm for the learning process suitable for hardware implemented Winner Takes Most Kohonen Neural Network (KNN) has been proposed in the paper. In networks of this type a neighborhood mechanism is used to improve the convergence propert ...
In this paper we present current mode, programmable, binary tree MIN/MAX filters designed for nonlinear data processing. Proposed circuits can be used in image filtration, to realize operations such as erosion or dilatation that are useful in noise reducti ...
Slow Feature Analysis (SFA) is an efficient algorithm for learning input-output functions that extract the most slowly varying features from a quickly varying signal. It has been successfully applied to the unsupervised learning of translation-, rotation-, ...
An IEEE 802.11n baseband transceiver ASIC is implemented in 0.13 mu m CMOS technology. The implementation has a core area of 14.4 mm(2) and is the first to support the optional 3- and 4-stream MIMO transmission modes of the standard for data rates up to 60 ...
Ieee Service Center, 445 Hoes Lane, Po Box 1331, Piscataway, Nj 08855-1331 Usa2009
A new learning strategy for object detection is presented. The proposed scheme forgoes the need to train a collection of detectors dedicated to homogeneous families of poses, and instead learns a single classifier that has the inherent ability to deform ba ...
Ieee Service Center, 445 Hoes Lane, Po Box 1331, Piscataway, Nj 08855-1331 Usa2009
As dictated by ongoing technology scaling and the advent of multi-core systems, each new generation of microprocessors and digital signal processors provides higher computing power and data throughput. However, the available bandwidth of the input/output ( ...
A new optimized algorithm for the learning process suitable for hardware implemented Winner Takes Most Kohonen Neural Network (KNN) has been proposed in the paper. In networks of this type a neighborhood mechanism is used to improve the convergence propert ...
Insticc-Inst Syst Technologies Information Control & Communication, Avenida D Manuel L, 27A 2 Esquerdo, Setubal, 2910-595, Portugal2009
An IEEE 802.11n baseband transceiver ASIC is implemented in 0.13 mu m CMOS technology. The implementation has a core area of 14.4 mm(2) and is the first to support the optional 3- and 4-stream MIMO transmission modes of the standard for data rates up to 60 ...
Ieee Service Center Single Publication Sales Unit, 445 Hoes Lane, Piscataway, Nj 08854 Usa2009
An initialization mechanism is presented for Kohonen neural network implemented in CMOS technology. Proper selection of initial values of neurons’ weights has a large influence on speed of the learning algorithm and finally on the quantization error of the ...
In this paper stochastic approximation theory is used to produce Iterative Learning Control algorithms which are less sensitive to stochastic disturbances, a typical problem for the learning process of standard ILC algorithms. Two algorithms are developed, ...