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In this letter, we report the performance of high-kappa/metal gate nanowire (NW) transistors without junctions fabricated with a channel thickness of 9 nm and sub-15-nm gate length and NW width. Near-ideal subthreshold slope (SS) and extremely low leakage currents are demonstrated for ultrascaled gate lengths with a high on-off ratio (I-on/I-off) > 10(6). For the first time, an SS lower than 70 mV/dec is achieved at L-G = 13 nm for n-type and p-type transistors, highlighting excellent electrostatic integrity of trigate junctionless NW MOSFETs.
Mihai Adrian Ionescu, Kirsten Emilie Moselund, Clarissa Convertino