Resistless nanofabrication by stencil lithography: A review

We present a review on stencil lithography and focus on the particular interest and challenges when applying it to the scalable fabrication of nm-size devices. We first describe the basic technique with its main advantages and challenges. Then we review the key results of stencil lithography in nanoscale patterning for the direct deposition of complex materials and the patterning on non-conventional substrates. In particular we discuss the blurring, which is a major limitation to achieving high pattern resolution in stencil lithography. Successful strategies to reduce the blurring based on etching processes and novel stencil designs are presented. Moreover, the paper presents the use of stencil masks beyond deposition, namely for localized etching and ion implantation processes. We also review the current state in research of dynamic stencil lithography, which is based on displacing the stencils with respect to the substrate during deposition. The paper concludes by presenting a broad range of applications for stencil lithography that benefit from the resistless fabrication. The fabricated nano-systems range from plasmonics and gratings for solar cells, electrical contacts for 2-D materials, transistor fabrication on planar and non-planar substrates, to magnetic nanostructures, plasmonic biosensing, cell and protein patterning, flexible devices, as well as the fabrication of NIL stamps and mass sensors integrated with CMOS. (C) 2014 Elsevier B.V. All rights reserved.

High-throughput surface patterning with wafer-sized stencils fabricated by a DUV/MEMS process

Jürgen Brugger, Marc Antonius Friedrich van den Boogaart

The endeavour to develop nanodevices demands for patterning methods in the nanometer scale. The continuous improvement in lithography methods based on deep UV (DUV), X-ray, or electron beam exposure allow for further progress in integrated circuit hardware manufacturing for the coming years. To bring nanodevices to the market, however, there is a need for fast, low-cost replication nanopatterning methods. In addition, an increased flexibility of the nanopatterning methods is important for the engineering of multimaterial and multifunctional nano/micro-electro-mechanical systems (NEMS/MEMS), such as polymer-based electronic and sensor devices, 3D microfluidic systems, and bio-analytical systems. The above-mentioned high-end patterning methods are all based on photolithography and etching, limiting the flexibility in substrate and material combinations. In addition, they have the drawback of the use of high-cost equipment. A series of alternative, complementary surface patterning methods are currently being developed that do not rely on photoresist exposure and thin-film etching steps, e.g. local printing of molecular layers (soft-lithography) and shadow-mask deposition (nanostencil patterning). The nanostencil method is a resistless patterning method based on direct, local deposition of material on an arbitrary surface through a solid-state silicon nitride (SiN) membrane , . We present here the advances towards a full-wafer (100 mm) DUV/MEMS-based nanostencil to allow high-throughput, large-area nanopatterning of mesoscopic structures (10^9 - 10^5 m). The mesoscopic patterns were first defined by a 4× reduced projection exposure using an ASML wafer stepper and then transferred into a SiN layer by means of reactive ion etching (RIE). The membranes were released by wafer-through etching using potassium hydroxide (KOH). Figure 1 shows the mid-process details of 200 nm DUV patterns after the RIE transfer into the 500-nm thick SiN layer. Patterning of nano-scale structures using stencils allows for a large choice of materials and surfaces to be nanopatterned, since it is a non-contact method and no etch steps need to be applied. We have studied the nanopatterning of metals (Al, Au, Bi, and Cr) on various surfaces (silicon, oxides, freestanding SiN cantilevers, and self-assembled monolayers (SAM)) for different applications (molecular electronics, nano-mechanical devices with a 90 MHz resonance frequency , as well as nano-scale Hall-sensor devices). Unconventional substrates for (Bio) MEMS and NEMS have also been applied such as highly ordered pyrolytic graphite (HOPG), polydimethylsiloxane (PDMS), and SU-8.

2004

Robust PECVD SiC membrane made for stencil lithography

Jürgen Brugger, Andreea Veronica Savu, Katrin Sidler Arnet, Wei Tang, Oscar Vazquez Mena, Shenqi Xie

Stencil lithography (SL) is a shadow mask technique which allows parallel, resistless, micro- and nano- patterning of material through apertures created in a membrane (stencil) onto a substrate. The stencils are usually made of LPCVD low-stress SiN due to its outstanding physical and chemical stability. How- ever, limitations are found for some speciﬁc design cases, where membranes can be distorted because of the deformations induced by stress from the deposited materials. Here we present a recently devel- oped PECVD SiC shadow mask for applications in SL. The SiC has higher Young’s modulus than SiN, which transfers to a better performance for SiC stencil than the shadow mask made of SiN in terms of robustness to the stress-induced deformation. We show direct local etching of SiO2 through SiC stencil, otherwise impossible with SiN masks. SiC stencils with both compressive and tensile stresses were fabricated and compared to the SiN stencils. The higher robustness to deformation and better resistance to etching of the SiC membranes allow for a wider choice of the deposited materials, leading themselves to a more precise pattern duplication and less complicated resistless dry etching applications.

Elsevier2011

Advances in Nanostenciling: resistless nanopatterning enables new applications

Jürgen Brugger, Andreea Veronica Savu

This paper presents the state-of-the-art of nanostencil as a direct and local patterning method. Stencil lithography is a high-resolution shadow mask technique that allows structuring surfaces without using the harsh process steps typically associated with photolithography (solvents, high temperature baking, etc.). Our work has concentrated on studying the technique and maximizing its potential in terms of resolution, scalability to full wafer, and applicability to various material systems. We found solutions to align the stencils to 100 mm substrates and reach sub-100 nm patterning capabilities by reducing the gap to the substrate and circumventing the aperture clogging during material deposition [1, 2]. We also used stencil lithography as an enabling technique for cost-efficient patterning of unconventional substrates. Thus, recently we have applied stencil lithography to a variety of new MEMS/NEMS, where other lithography methods would fail or would be prohibitively expensive. We patterned superconducting tunnel junctions[3], metallic nanowires [4, 5] and nanodots for plasmonic applications [6] on planar rigid substrates. On flexible substrates we micro-fabricated organic electronics, using up to 3 aligned stencil lithography steps [7]. Metallic catalysts were nanopatterned through stencil on semi-released cantilevers. This allowed for a high throughput fabrication of C nanotubes and Si nanowire scanning probes [8]. The stencil can be used in a dynamic mode, by moving in situ relative to the substrate while material is evaporated [9]. This allows for custom “design” of patterns using standard apertures in the stencil, including thickness-variable structures and closed-loop geometries not available otherwise with a static stencil. This paper provides an overview of the current capabilities of nanostencil lithography, showing some of the most recent scientific highlights and concrete application examples.