A 2.4-GHz low power polar transmitter for wireless body area network applications
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This paper presents a complementary metal–oxide– semiconductor (CMOS) implementation of a conscience mechanism used to improve the effectiveness of learning in the winnertakes- all (WTA) artificial neural networks (ANNs) realized at the transistor level. T ...
Institute of Electrical and Electronics Engineers2010
In this paper a novel approach to optimize digital integrated circuits yield with regards to speed and area/power for aggressive scaling technologies is presented. The technique is intended to reduce the effects of intra-die variations using redundancy app ...
A prototype of a high-density multielectrode array for in vitro recording of electrogenic cell networks has been developed. On a surface of 1.92x1.92mm2, it includes 32x32 pixels with a dimension of 60x60µm2. For local amplification of the sensed extracell ...
Lattice-reduction (LR)-aided successive interference cancellation (SIC) is able to achieve close-to optimum error-rate performance for data detection in multiple-input multiple-output (MIMO) wireless communication systems. In this work, we propose a hardwa ...
Ieee Service Center, 445 Hoes Lane, Po Box 1331, Piscataway, Nj 08855-1331 Usa2010
Based on a detailed study of the radiation tolerance of high-voltage transistors, 2 commercial CMOS technologies have been selected for the design of synchronous buck DCDC converter ASICs. Three prototype converters have been produced, embedding increasing ...
A new idea as well as CMOS implementation of a pulse-shaping filter useful in nuclear medicine to realize a multi-element detection by means of a multi-channel readout front-end ASIC have been presented. The filter changes the shape of pulses delivered by ...
This article presents a power-efficient low-voltage differential signaling (LVDS) output driver circuit. The proposed approach helps to reduce the total input capacitance of the LVDS driver circuit and hence relaxes the tradeoffs in designing a low-power p ...
This research work deals with the design of linear CMOS RF power amplifiers. Two important aspects are treated: efficiency enhancement and frequency-tunable capability. For this purpose, two different integrated circuits were realized in a 0.11 µm technolo ...
This paper discusses techniques, limitations and possible future developments of circuits based on transistors operated in the weak inversion (w.i.) mode, also called subthreshold mode. In analog circuits, w.i. is reached at very low current, but it is als ...
Ieee Service Center, 445 Hoes Lane, Po Box 1331, Piscataway, Nj 08855-1331 Usa2009
This work reports on gate voltage dependent source and drain series resistance and associated barrier height in modified Double Gate Schottky MOSFETs with dopant segregation. We show that in our devices the series resistances is significantly reduced by lo ...