JESD204B Compliant 12.5 Gb/s LVDS and SST Transmitters in 28 nm FD-SOI CMOS

Publications associées (29)

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Wireless Power Transfer and Data Communication for Implantable Autonomous Monitoring and Detection of Epilepsy In Vivo

Kerim Türe

The impact of technological advancement became significant and still has an essential role to play in the diagnosis and treatment of diseases. Nowadays, personalized medicine and therapy are on the rise as a consequence of the developed and cheaper medical ...

EPFL2019

ISI Sensitivity of PAM Signaling for Very High-Speed Short-Reach Copper Links

Yusuf Leblebici, Seyed Armin Tajalli, Firat Çelik, Ayça Akkaya

This paper presents a comparative study, analyzing the potentials of pulse amplitude modulation (PAM) for implementing next generation high-speed copper wireline links. This comparative study analyzes the sensitivities of PAM2, PAM4 and PAM8 to inter-symbo ...

IEEE2019

Design Considerations and Performance Trade-Offs for 56Gb/s Discrete Multi-Tone Electrical Link

Yusuf Leblebici, Gain Kim, Thomas Toifl

For communicating over mid-to-long-reach electrical links at a data-rate above 56Gb/s, ADC-based receiver (RX) has become a dominant architecture due to its strong equalization capability using complex digital signal processing algorithm benefiting from th ...

IEEE2019

Adaptive Receiver Design for High Speed Optical Communication

Ilter Ozkaya

Conventional input/output (IO) links consume power, independent of changes in the bandwidth demand by the system they are deployed in. As the system is designed to satisfy the peak bandwidth demand, most of the time the IO links are idle but still consumin ...

EPFL2018

Satisfiability-Based Methods for Digital Circuit Design, Debug, and Optimization

Andrew James Becker

Designing digital circuits well is notoriously difficult. This difficulty stems in part from the very many degrees of freedom inherent in circuit design, typically coupled with the need to satisfy various constraints. In this thesis, we demonstrate how for ...

EPFL2018

FPGA-SPICE: A Simulation-Based Architecture Evaluation Framework for FPGAs

Giovanni De Micheli, Xifan Tang, Pierre-Emmanuel Julien Marc Gaillardon, Edouard Giacomin

In this paper, we developed a simulation-based architecture evaluation framework for field-programmable gate arrays (FPGAs), called FPGA-SPICE, which enables automatic layout-level estimation and electrical simulations of FPGA architectures. FPGA-SPICE can ...

2018

A Timing-Monitoring Sequential for Forward and Backward Error-Detection in 28 nm FD-SOI

Andreas Peter Burg, Andrea Bonetti, Adam Shmuel Teman, Jeremy Hugues-Felix Constantin

The increasing impact of variability on near-threshold nanometer circuits calls for a tighter online monitoring and control of the available timing margins. Error-detection sequentials are widely used together with error-correction techniques to operate di ...

IEEE2018

Parallel Implementation Technique of Digital Equalizer for Ultra-High-Speed Wireline Receiver

Cosimo Aprile, Yusuf Leblebici, Alessandro Cevrero, Lukas Kull, Gain Kim, Ilter Ozkaya, Thomas Toifl

This paper presents a parallel implementation technique of digital equalizer for high-speed wireline serial link receiver (RX). In wireline RX, inter-symbol interference (ISI) is mitigated by continuous-time linear equalizer, and the remaining ISI is cance ...

2018

Multi-Tone Signaling and ADC-Based Digital Receiver for High-Speed Wireline Serial Links

Gain Kim

The exponential growth of Internet traffic and related demands for higher communication speed pushes processor-to-processor and processor-to-memory interconnects to provide further higher data-rate. Often time, processor-to-memory interconnectsâ speed is ...

EPFL2018

A Sub-μW/Channel, 16-Channel Seizure Detection and Signal Acquisition SoC Based on Multichannel Compressive Sensing

Alexandre Schmid, Reza Ranjandish

An accurate 16-channel seizure detection system-on-chip is presented, which is based on extracting features from the compressed recorded data using multichannel compressive sensing (MCS). MCS is used to reduce the transmission data rate of sparse biologica ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2018

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