Ordered nanostructures on silicon substrates

Silicon is today the main material used in electronics. It is a very advanced and mature technology. It is therefore clear that new technological concepts and materials should be introduced through the integration on the silicon platform. III-V semiconductors, such as GaAs and InAs, are high performance semiconductors, with direct bandgap and high carrier mobility, what makes them very prominent candidates for future electronics and optoelectronics. Lattice, thermal and polarity mismatch have been for decades limiting their integration on Si in the form of thin film technology. The nanowire geometry brings new prospects in this direction by reducing the contact area between mismatched materials,. Now, while growth of defect-free III-V structures on silicon is important, use in applications requires the nanostructures to be placed deterministically following a certain design/order. In this thesis we have studied different mechanisms to obtain ordered nanostructures on a silicon substrate, with the goal of increasing its functionality. The core part of this work was dedicated to the integration of III-V nanowires on Si in the formof ordered arrays. We have considered both GaAs and InAs nanowires. This process has several requirements: substrate fabrication and the growth process should be CMOS compatible, nanowires within the arrays should be grown vertically with a yield close to 100% and nanowires should be clones-looking and performing the same. An additional point to consider is that the fabrication process should be compatible with large scale techniques. The substrate requirements for obtaining ordered arrays of Ga-assisted GaAs nanowires on silicon were identified. In particular, we focused on the initial stages of growth, that turned to be key for achieving a high yield in the arrays. We found that the positioning of the Ga droplet within the predefined holes on the substrate determined whether the nanowire would grow perpendicularly to the substrate. Our HRTEMstudies on the titled nanowires show that the initial nanowire seeds seem to nucleate at the corner of the nanoscale holes. Instead, the crystal seeds of vertical nanowires occupy homogeneously the nanoscale holes. Achieving high yield in the growth of GaAs arrays on silicon also allowed us to study their evolution in time. We demonstrated that there is an incubation time for nanowires to start growing. This incubation time is different from NW to NWand leads to a relatively broad length distribution. We proposed a solution and showed how an increase in the supersaturation in the Ga droplet leads to the formation of homogeneous arrays. Growth of InAs nanowires in ordered arrays on silicon was based on the concept of guided growth. We used a SiO2 nanotube templates to promote vertical growth. Due to the directionality of MBE, achieving growth inside a nanotube was especially challenging. Our results provided new insights on the role of different pathways of the In and As4 adatoms during growth. In this part, large scale patterning by phase shift photolithography was demonstrated as an alternative to the conventionally used electron beam lithography. Stain etching method for producing porous silicon was applied on top-bottom fabricated Si micropillars. This led to geometrically driven electrochemical dissolution of silicon trough the center of the microstructure forming microtubes. The optical properties were also studied and used to produce functional 3D LED.

Spin-valley optoelectronics based on two-dimensional materials

Dmitrii Unuchek

Two-dimensional (2D) materials, in particular graphene and transition metal dichalcogenides (TMDC), have attracted great scientific interest over the last decade, revealing exceptional mechanical, electrical and optical properties. Owing to their layered nature, subnanometer-thick single-layer forms of these crystals can be chemically grown or mechanically isolated, representing an ultimately scaled-down platform for further miniaturization of electronic devices. Indeed, the large family of 2D materials contains hundreds of members, including metals, semiconductors, insulators, and others, covering the whole spectrum of potential applications. Availability of all necessary building blocks for the construction of all-2D solid-state devices makes this platform ideal for fabrication of ultrathin, transparent and flexible devices. Extensively investigated graphene has demonstrated excellent electrical properties. However, the absence of a bandgap is an obstacle for its interaction with light and therefore limits applications in optics. In this aspect, atomically thin TMDC semiconductors appear to be an alternative, more promising platform, as they possess a direct band gap in the visible range in the monolayer form. Despite being only three atoms thick, these semiconductors demonstrate exceptionally large light absorption, efficient light emission, and strong light-matter interaction, attracting justified interest from the optics community. We will focus on their potential applications for optoelectronics in Chapter 4. Even more, broken inversion symmetry and strong spin-orbit coupling in single-layer TMDC crystals reveal a new quantum number, the so-called valley index. Indeed, this unique degree of freedom of charge carriers is known for some materials since the 1970s. However, in the case of 2D semiconductors, spin-valley locking mechanism and valley contrasting optical selection rules open new ways for addressing, manipulation and sensing of this pseudospin, opening the whole new field of valleytronics. Due to the large splitting of the valence band, spin and valley degree of freedom become locked in these atomically thin materials. We employ this unique feature in Chapter 5 for indirect injection of spins into graphene by pumping valley polarized carriers in an adjacent TMDC monolayer. Being gapless, graphene does not allow direct optical injection of spins. Another striking feature of 2D materials is their unique ability to be stacked in vertical heterostructures with strong electrical coupling between layers. The weak van der Waals force, which keeps components together, provides freedom in the assembly process, so that a lattice mismatch or a twist angle becomes unimportant in the first approximation. This provides a novel platform for harvesting complementary properties of the constituent materials, allowing the engineering of new artificial meta-materials as we demonstrate in Chapter 6. Furthermore, synergistic effects in van der Waals heterostructures enable completely new properties and phenomena, which do not exist in the single materials, with twist angle being an important knob for tuning these effects. We observe and exploit such novel phenomena arising in heterostructures of 2D semiconductors in the last chapter of this thesis. On the way to the realization of practical optoelectronic and valleytronic applications, this thesis studies fundamental aspects of rich spin-valley physics of atomically thin semiconductors

EPFL2019

Growth mechanisms of III-V semiconductor nanostructures on silicon

Eleonora Russo

The aim of this thesis is to understand the dynamics of the growth of catalyst-free III-V semiconductor nanostructures on silicon substrates, focusing the attention mainly on the early stages of growths. A detailed understanding of this first phase of the process is a key step to obtain a completely successful integration of highly functional materials, like the III-Vs, on the CMOS platform, and to synthesize nanostructures with tailored properties. Indeed, the first mandatory step in nanotechnology is the possibility to fabricate nanostructures and nanomaterials, i.e. structures and materials with at least one dimension falling in the nanometer scale. Among different nanostructures, semiconductor nanowires (NWs) have proven to be versatile building blocks for a manifold of applications. In this work two types of nanostructures have been investigated: NWs and V-shaped nanomembranes. Their growth has been performed by molecular beam epitaxy (MBE), a technique that allows to produce ultrapure nanostructures, with very high crystalline quality and atomically sharp interfaces. The growth has been obtained with a self-catalyzed approach, meaning that no external material, apart the constituents of the semiconductor to be grown, has been used. This allows to avoid any possible contamination of the substrate, a fundamental requirement to ensure a full compatibility with the silicon technology. We performed a systematic study on the growth directions of self-catalyzed GaAs NWs grown on silicon substrates. Indeed, when growing III-V NWs on silicon non vertical wires always appear. In order to make NW-based structures on silicon effective for applications like energy harvesting (one of the most promising so far) it is mandatory to control the growth direction and in particular to maximize the yield of NWs perpendicular to the surface. By analyzing the first stages of growth we shed light on the mechanism responsible for the different NWs orientations: we optimized the growth conditions to obtain up to a 100% yield of vertical NWs. Having attained growth of nanostructures in an ordered manner along regular arrays is a subsequent step for the fabrication of devices. In this work our capability to control growth of InAs and GaAs NWs in arrays is presented and the existing challenges for the reproducible growth are highlighted. Lastly, we turned to the growth of nanostructures on exactly oriented (001) substrates, which would make the III-V/group IV integration compatible with the current technological pro- cesses. This led us to the discovery of a new class of III-V semiconductor nanostructures, called V-shaped nanomembranes, characterized by a unique morphology and growth mech- anism and possessing interesting optical properties. An accurate characterization of their morphology and a complete understanding of their nucleation and growth mechanism is reported. These results give a clear pathway of how to obtain fully controlled structures which as such could be useful for the realization of complex branched interconnected nanoelectronic devices.

EPFL2015

Stretchable and Highly Bendable Thin Film Transistors Based on Atomically Thin Chemical Vapor Deposited Molybdenum Disulfide

Yen-Cheng Kung

Two-dimensional (2D) materials have received tremendous research attention recently, as they possess peculiar physical properties in their monolayer and few-layer forms, which further lead to novel applications. A wide range of 2D materials covers insulators, metals, superconductors and semiconductors with various bandgap, giving a fresh platform to reinvent conventional electronic and optoelectronic devices with new advantages. Molybdenum disulfide (MoS2), belonging to the group of transition metal dichalcogenides (TMDCs), has been widely studied for its particular physical properties and potential applications as a leading example among 2D semiconductors. In this thesis, we focus on the applications ofMoS2 in microelectronic and micro-electromechanical devices. The MoS2 we studied is grown specifically by chemical vapor deposition, which offers the highest potential in large area growth. Utilizing the flexible nature such as high in-plane fracture strain and low bending stiffness of atomically thinMoS2, we developed stretchable thin film transistors (TFTs) on polydimethylsiloxane (PDMS) and highly bendable thin film transistors on polyimide. The fabrication process is ameliorated and designed to provide good chemical and temperature compatibility to the polymer substrates. Electrical performance of the flexible devices under different degrees of bending and stretching has been studied. The stretchableMoS2 TFTs could sustain up to 4% of uniaxial tensile strain maintaining device function, and the failure occurs at 5% of strain due to the fracture in gate dielectric layer. The highly bendableMoS2 TFTs with parylene-C gate dielectric layer exhibit tolerance to the smallest bending radius of 0.625 mm. Different encapsulation layers such as HfO2, Cytop and SU8 have been implemented on the bendable devices to improve the performance represented by the increase in field effect mobility, reduction in hysteresis and better endurance to mechanical deformation. The resulting flexibleMoS2 TFTs show field effect mobility of 21.4 cm^2V^-1s^-1 and a large on-off ratio of 106 in air. The SU8 encapsulation layer is further demonstrated as controllable n-type doping strategy with low temperature process, which is ideal for flexible MoS2 devices as it additionally exhibits good stability in air and water.

EPFL2018