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Reconfigurable optical generation of nine Nyquist WDM channels with sinc-shaped temporal pulse trains using a single microresonator-based Kerr frequency comb

Publications associées (32)

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Unlabeled Sensing of Multi-Input FRI Signals

Taulant Koka

Shannon's sampling theorem for bandlimited signals, formulated in 1949, has become a cornerstone for modern digital communications and signal processing. The importance of sampling and reconstruction of analog signals has led to great advances in the field ...

2022

High-Speed ADC Design and Optimization for Wireline Links

Ayça Akkaya

The ever-growing global internet traffic has increased demand for higher speed data transmission. As the bandwidth requirements of wireline links increase, extensive digital equalization techniques are required to compensate for the high-frequency channel ...

EPFL2021

An 8-Bit 800 MS/s Loop-Unrolled SAR ADC With Common-Mode Adaptive Background Offset Calibration in 28 nm FDSOI

Yusuf Leblebici, Firat Çelik, Ayça Akkaya

This paper presents a low-power single-channel 8-bit loop-unrolled (LU) successive approximation register (SAR) analog-to-digital-converter (ADC) with a novel common-mode adaptive background comparator offset calibration scheme. LU-SAR ADCs use multiple co ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2021

Uncertain Sampling with Certain Priors

Golnooshsadat Elhami

Sampling has always been at the heart of signal processing providing a bridge between the analogue world and discrete representations of it, as our ability to process data in continuous space is quite limited. Furthermore, sampling plays a key part in unde ...

EPFL2021

A Low-Power 9-Bit 222 MS/s Asynchronous SAR ADC in 65 nm CMOS

Yusuf Leblebici, Firat Çelik, Ayça Akkaya

This paper presents a 9-bit 222 MS/s low-power asynchronous single-bit/cycle successive approximation register (SAR) ADC. The SAR ADC combines techniques such as asynchronous clocking, binary-weighted custom-designed capacitive DAC with small unit capacito ...

IEEE2020

The demand on high speed Analog to Digital Converters (ADCs) has increased considerably the last years. From communications circuit to high speed oscilloscopes, Giga Samples per second (GS/s) ADCs are requested. With the scaling of the CMOS technology, des ...

EPFL2019

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It is a classic problem to estimate continuous-time sparse signals, like point sources in a direction-of-arrival problem, or pulses in a time-of-flight measurement. The earliest occurrence is the estimation of sinusoids in time series using Prony's method. ...

Institute of Electrical and Electronics Engineers2017

A Sampling Theory for Non-Decaying Signals

Michaël Unser, Quy Ha Nguyen

The classical assumption in sampling and spline theories is that the input signal is square-integrable, which prevents us from applying such techniques to signals that do not decay or even grow at infinity. In this paper, we develop a sampling theory for m ...

2017

A DAC Assisted Speed Enhancement Technique for High Resolution SAR ADC

Mustafa Kilic, Yusuf Leblebici

In this paper, a technique aiming at enhancing the conversion speed of asynchronous high resolution SAR ADCs is presented. In conventional SAR ADCs, the capacitive DAC size is growing exponentially with the converter resolution. The settling time of the MS ...

2017

A Cryogenic 1 GSa/s, Soft-Core FPGA ADC for Quantum Computing Applications

Edoardo Charbon, Harald Arjan Robert Homulle

We propose an analog-to-digital converter (ADC) architecture, implemented in an FPGA, that is fully reconfigurable and easy to calibrate. This approach allows to alter the design, according to the system requirements, with simple modifications in the firmw ...

2016