Êtes-vous un étudiant de l'EPFL à la recherche d'un projet de semestre?
Travaillez avec nous sur des projets en science des données et en visualisation, et déployez votre projet sous forme d'application sur GraphSearch.
In this contribution, we present an electron selective passivating contact metallised with a low temperature process to target front side applications in crystalline silicon (c-Si) solar cells. In addition to an interfacial silicon oxide (SiOx) and an in-situ phosphorous doped micro-crystalline silicon (μc-Si(n)) layer, it comprises an ultra-thin indium tin oxide (ITO) layer of 15 nm for lateral conductivity and a hydrogen rich silicon nitride (SiNx:H) layer which serves as hydrogen (H) reservoir and as anti-reflection coating. We use one single thermal treatment for 30 min at 350 °C to sinter the screen-printed paste, to recover sputtering damage induced during ITO deposition, and to diffuse hydrogen from the SiNx:H layer towards the c-Si/SiOx interface where it passivates interfacial defects. Applied to symmetrically processed textured samples, we find implied open-circuit voltage (iVOC) > 728 mV for optimal ITO thickness of 15 nm and annealing temperatures of 350 °C. The developed stack was applied on the front textured side of co-annealed (800 °C) p-type c-Si solar cells in combination with a tunnel oxide hole selective passivating contact on the rear side. We demonstrate solar cells with fill factor (FF) up to 81.9% and an open-circuit voltage (VOC) up to 719 mV. With a short-circuit current density (JSC) of 38.6 mA/cm2, we obtain a final cell efficiency to 22.8%. We find that the annealing of the SiNx:H/ITO stack strongly increases the ITO free carrier density penalizing the solar cell spectral response at high wavelengths.