A massively scalable Time-to-Digital Converter with a PLL-free calibration system in a commercial 130 nm process
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Institute of Electrical and Electronics Engineers2013
The jitter and the phase noise of ring oscillators utilizing subthreshold source-coupled logic (STSCL) style are analyzed in this paper. Closed-form equations are derived to predict the jitter and phase noise caused by white and flicker noise. Measurement ...
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