Operational Map And Thermal Performance Of A Thermosyphon Cooling System For Compact Servers

This paper advances the state-of-the-art in novel passive two-phase systems for more efficient cooling of datacenters and telecom central offices compared to the traditional air-based cooling solutions (e.g. aisle-based containment systems). The proposed passive two-phase technology uses numerous server-level thermosyphons to dissipate the heat generated by critical components, such as central processing units, accelerators, etc., with the flexibility of selecting the rack-level and room-level cooling elements depending on the deployment scenarios. The main goal of this paper is to experimentally investigate the thermal performance and maximum heat removal capability of a server-level thermosyphon for cooling compact servers. The experimental apparatus, built at Nokia Bell Labs, incorporates a single 7-cm high liquid-cooled thermosyphon that fits within a 2U server (smaller form factors can be achieved by a proper design that would further reduce the thermosyphon's height). The heat source is represented by a pseudo-chip, composed of six parallel cartridge heaters installed in a copper block that incorporates local temperature measurements and is able of dissipating a total power of approximate to 500 W over a footprint area of 3.5 cm x 3.5 cm (corresponding heat flux of 41 W/cm(2)). Steadystate experiments were carried out at various heat loads up to 240 W (corresponding heat flux of approximate to 20 W/cm(2)), filling ratios and secondary side inlet conditions (coolant temperatures and mass flow rates), using R1234ze(E) and deionized water as the working fluids on the primary and secondary side, respectively. Test results demonstrate high heat transfer performance of the server-level thermosyphon over a wide range of conditions, and operating points are identified and classified into an operational map. Thermosyphon-based cooling systems across multiple length scales can significantly improve operation in terms of lowering energy consumption, allowing for higher hardware density, increased processing speed and reliability.