Publication
Instruction-Level Power Side-Channel Leakage Evaluation of Soft-Core CPUs on Shared FPGAs
Publications associées (38)
Low-Power Design of Digital VLSI Circuits around the Point of First Failure
As an increase of intelligent and self-powered devices is forecasted for our future everyday life, the implementation of energy-autonomous devices that can wirelessly communicate data from sensors is crucial. Even though techniques such as voltage scaling ...
EPFL2019Trading off Energy versus Accuracy in Modern Computing Systems
Jérémy Lucien Maurice Schlachter
The slowdown of Moore's law, which has been the driving force of the electronics industry over the last 5 decades, is causing serious problem to Integrated Circuits (ICs) improvements. Technology scaling is becoming more and more complex and fabrication co ...
EPFL2018FPGAs versus GPUs in Data centers
This article presents position statements and a question-and-answer session by panelists at the Fourth Workshop on Computer Architecture Research Directions. The subject of the debate was the use of field-programmable gate arrays versus GPUs in datacenters ...
Institute of Electrical and Electronics Engineers2017Microarchitectural Low-Power Design Techniques for Embedded Microprocessors
Jeremy Hugues-Felix Constantin
With the omnipresence of embedded processing in all forms of electronics today, there is a strong trend towards wireless, battery-powered, portable embedded systems which have to operate under stringent energy constraints. Consequently, low power consumpti ...
EPFL2016DynOR: A 32-bit Microprocessor in 28 nm FD-SOI with Cycle-By-Cycle Dynamic Clock Adjustment
Andreas Peter Burg, Adam Shmuel Teman, Thomas Christoph Müller, Andrea Bonetti, Jeremy Hugues-Felix Constantin, Lorenz Flavio Schmid
This paper presents DynOR, a 32-bit 6-stage OpenRISC microprocessor with dynamic clock adjustment. To alleviate the issue of unused dynamic timing margins, the clock period of the processor is adjusted on a cycle-by-cycle level, based on the instruction ty ...
Ieee2016Analog Programmable Distance Calculation Circuit for Winner Takes All Neural Network Realized in the CMOS Technology
This paper presents a programmable analog current-mode circuit used to calculate the distance between two vectors of currents, following two distance measures. The Euclidean (L2) distance is commonly used. However, in many situations, it can be replaced wi ...
Institute of Electrical and Electronics Engineers2016Hardware/Software Co-Design of Ultra-Low Power Biomedical Monitors
Ongoing changes in world demographics and the prevalence of unhealthy lifestyles are imposing a paradigm shift in healthcare delivery. Nowadays, chronic ailments such as cardiovascular diseases, hypertension and diabetes, represent the most common causes o ...
EPFL2016Signaling in 3-D integrated circuits, benefits and challenges
Three-dimensional (3-D) or vertical integration is a design and packaging paradigm that can mitigate many of the increasing challenges related to the design of modern integrated systems. 3-D circuits have recently been at the spotlight, since these circuit ...
EPFL2015Integrated Microfluidic Power Generation and Cooling for Bright Silicon MPSoCs
David Atienza Alonso, Arvind Raj Mahankali Sridhar, Mohamed Mostafa Sabry Aly, Bruno Michel
The soaring demand for computing power in our digital information age has produced as collateral undesirable effect a surge in power consumption and heat density for computing servers. Accordingly, 30-40% of the energy consumed in state-of-the-art servers ...
IEEE/ACM Press2014Energy-Aware Processing Platform Exploration for Embedded Biosignal Analysis
According to the World Health Organization, lifestyle-related diseases, e.g., cardiovascular diseases are the major cause of mortality worldwide. An accurate and continuous medical supervision is highly required for diagnosis and treatment of such diseases ...
EPFL2013