Publication
Chaosity: Understanding Contemporary NUMA-architectures
Publications associées (109)
EdgeAI-Aware Design of In-Memory Computing Architectures
Driven by the demand for real-time processing and the need to minimize latency in AI algorithms, edge computing has experienced remarkable progress. Decision-making AI applications stand out for their heavy reliance on data-centric operations, predominantl ...
EPFL2024Multi-Ported GC-eDRAM Bitcell with Dynamic Port Configuration and Refresh Mechanism
Adam Shmuel Teman, Robert Giterman
Embedded memories occupy an increasingly dominant part of the area and power budgets of modern systems-on-chips (SoCs). Multi-ported embedded memories, commonly used by media SoCs and graphical processing units, occupy even more area and consume higher pow ...
MDPI2024HetCache: Synergising NVMe Storage and GPU acceleration for Memory-Efficient Analytics
Anastasia Ailamaki, Periklis Chrysogelos, Hamish Mcniece Hill Nicholson, Syed Mohammad Aunn Raza
Accessing input data is a critical operation in data analytics: i) slow data access significantly degrades performance, and ii) storing everything in the fastest medium, i.e., memory, incurs high operational and hardware costs. Further, while GPUs offer in ...
20232D Nanosystems: Applications of 2D Semiconductors for In-Memory Computing
Machine learning and data processing algorithms have been thriving in finding ways of processing and classifying information by exploiting the hidden trends of large datasets. Although these emerging computational methods have become successful in today's ...
EPFL2023Post-Moore's Law Fusion: High-Bandwidth Memory, Accelerators, and Native Half-Precision Processing for CPU-Local Analytics
Anastasia Ailamaki, Viktor Sanca
Modern data management systems aim to provide both cutting-edge functionality and hardware efficiency. With the advent of AI-driven data processing and the post-Moore Law era, traditional memory-bound scale-up data management operations face scalability ch ...
2023Acceleration of Control Intensive Applications on Coarse-Grained Reconfigurable Arrays for Embedded Systems
David Atienza Alonso, Miguel Peon Quiros, Benoît Walter Denkinger
Embedded systems confront two opposite goals: low-power operation and high performance. The current trend to reach these goals is toward heterogeneous platforms, including multi-core architectures with heterogeneous cores and hardware accelerators. The lat ...
2023Rebooting Virtual Memory with Midgard
Virtual Memory (VM) is a critical programming abstraction that is widely used in various modern computing platforms. With the rise of datacenter computing and birth of planet-scale online services, the semantic and capacity requirements from memory have ev ...
EPFL2023Building Chips Faster: Hardware-Compiler Co-Design for Accelerated RTL Simulation
The demise of Moore's Law and Dennard scaling has resulted in diminishing performance gains for general-purpose processors, and so has prompted a surge in academic and commercial interest for hardware accelerators.Specialized hardware has already redefined ...
EPFL2023Exploring brain-inspired multi-core heterogeneous hardware templates for low-power biomedical embedded systems
The miniaturization of integrated circuits (ICs) and their higher performance and energy efficiency, combined with new machine learning algorithms and applications, have paved the way to intelligent, interconnected edge devices. In the medical domain, they ...
EPFL2023Bit-Line Computing for CNN Accelerators Co-Design in Edge AI Inference
David Atienza Alonso, Giovanni Ansaloni, Alexandre Sébastien Julien Levisse, Marco Antonio Rios, Flavio Ponzina
By supporting the access of multiple memory words at the same time, Bit-line Computing (BC) architectures allow the parallel execution of bit-wise operations in-memory. At the array periphery, arithmetic operations are then derived with little additional o ...
2023