Energy-Efficient Electronic Functions Based on the Co-integration of 2D and Ferroelectric Materials

The digital revolution has significantly transformed our world over the past decades, driven by the scaling of transistor dimensions and the exponential increase in computation power. However, as the CMOS scaling era approaches its end, the semiconductor industry encounters significant challenges and the necessity to redefine its research priorities. Moreover, with the growth of the Internet of Things (IoT) and Edge Artificial Intelligence (AI) applications that require energy-efficient real-time information processing, the demand for low-power, large-scale integration, and novel functionality has increased. Addressing these challenges necessitates novel approaches to device principles and materials that go beyond the limitations of traditional semiconductor devices. The concept of "Beyond CMOS" devices aims to overcome the constraints of the MOSFET structure while complementing CMOS technology. This thesis aims to explore the potential of two-dimensional (2D) and ferroelectric materials in enabling future electronic functions and facilitating the implementation of neuromorphic systems. By examining the exploitation of these new materials and their integration into device architectures, novel building blocks capable of meeting the diverse requirements of future applications will be introduced. The thesis project involved the fabrication of heterojunction devices, starting with 1D/2D SWCNT/WSe2, to explore scaled multifunctional devices with a functional area below 5 nm. Subsequently, the integration of a CMOS-compatible silicon-doped HfO2 ferroelectric material into the gate stack of a 2D/2D material system was investigated. The ferroelectric-gated WSe2/SnSe2 TFET was successfully demonstrated and extensively characterized across a wide range of temperatures. In another device configuration, artificial synapses based on MoS2 ferroelectric field-effect transistors (FeFETs) have been presented as a significant step toward realizing the hardware needed for neuromorphic computing. Building upon the results obtained in previous chapters, the co-integration of logic switches and neuromorphic functions is proposed to create new computing architectures with low power consumption and novel functionalities. We show that the 2D semiconductor WSe2 and 2D/2D WSe2/SnSe2 can be integrated with doped high-k ferroelectric and high-k dielectric gate stacks. With this single platform, four types of logic switches — 2D MOSFETs, 2D/2D tunnel FETs, negative capacitance 2D FETs, and negative capacitance 2D/2D tunnel FETs — can be created. The shared ferroelectric gate stacks on 2D devices can also be exploited to create co-integrated artificial synapses for neuromorphic computing. Finally, the thesis realizes novel on-chip electrostatic supercapacitors using the same ferroelectric stack employed in previous chapters. These advancements throughout the thesis highlight the potential of integrating novel materials and device architectures to enhance performance, enable new functionalities, and pave the way for future developments in energy-efficient devices, neuromorphic computing, and energy storage.