Publication

The Case for Performance Interfaces for Hardware Accelerators

George Candea, Jiacheng Ma, Rishabh Ramesh Iyer
2023
Article de conférence
Résumé

While systems designers are increasingly turning to hardware accelerators for performance gains, realizing these gains is painstaking and error-prone. It can take several person-months to determine if a given accelerator is a good fit for a given piece of code, and accelerators that cost millions of dollars to build can slow down the very systems they were designed to accelerate. We argue that hardware accelerators must come with performance interfaces—interfaces that provide usable information about the accelerator’s performance behavior just like semantic interfaces do for functionality—to facilitate their correct use. Since accelerators do not provide new functionality and are only useful if they improve system performance, performance interfaces are as integral to their correct use as semantic interfaces.

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