Advanced Silicon and SWIR Single-Photon Avalanche Diodes: Design, Simulation, and Characterization

Low-level light detection with high spatial and timing accuracy is a growing area of interest by virtue of applications such as light detection and ranging (LiDAR), biomedical imaging, time-resolved Raman spectroscopy, and quantum applications. Single-photon avalanche diodes (SPAD) offering the capability of detecting picosecond transients at the single-photon level are becoming a new trend for these needs. Silicon-based SPADs have demonstrated superior performance in the visible wavelength window benefiting from the mature complementary-oxide-metal semiconductor technology. Nevertheless, silicon-based SPADs exhibit a significant efficiency drop in the near-infrared (NIR) and short-wave infrared (SWIR) regions due to their bandgap (1.1 eV) and since silicon is an indirect bandgap material. Extending SPAD's efficiency towards the NIR/SWIR region is a key requirement for eye-safe LiDAR and fiber optic-based telecommunication applications. This thesis explores high-performance single-photon detectors using Silicon and InGaAs/InP-based SPAD technologies for QKD and LiDAR applications. It aims to develop compact detectors operable at near room temperature. The research extensively characterizes SAG-based and double-diffusion InGaAs/InP SPADs, alongside Silicon SPADs in 55 nm BCD technology, assessing DCR, PDP, timing jitter, and uniformity. The SAG-based design offers a novel InGaAs/InP SPAD structure, reducing the electric field at the edges and improving DCR and uniformity. Moreover, this method does not utilize the standard shallow diffusion and improves the fill factor of the SPAD. The thesis also investigates smaller diameter devices for further DCR reduction. In addition, the thesis introduces a unique simulation environment for PDP, DCR, IV, and breakdown voltage of SPADs using TCAD tools and focusing on 2D simulations. The simulation successfully predicts these performance metrics, allowing an easier and more robust design environment. It will be useful to optimize the device performance for specific target metrics and reduce fabrication iterations to achieve the best performance. Apart from SAG-based InGaAs/InP SPADs, double-diffusion-based InGaAs/InP SPADs are also examined, using both shallow and deep diffusion processes for device fabrication. This technique helps in managing the electric field within the SPAD, thereby reducing-edge breakdown. The research explores the impact of diffusion depths on device performance, especially DCR. Adjusting these depths affects the electric field and TAT generation, influencing the SPAD's efficiency. The work also looks forward to enhancing SPAD performance and developing SPAD arrays integrated with ROIC. Finally, the thesis explores the implementation and advantages of Silicon SPADs. Leveraging mature silicon fabrication technologies, Silicon SPADs offer ease of implementation, advanced back-end processing, and low defect ratios. Despite their limited efficiency in the NIR range, the benefits of monolithic integration, cost-effectiveness, and widespread availability make them an attractive alternative. Four different SPAD designs were fabricated using 55 nm BCD technology, addressing the challenges and solutions in designing with standard doping layers. A particular focus is given to deep SPAD designs with and without a PW layer, revealing that the inclusion of the PW layer significantly improves efficiency.